TI中文支持网关于EPWM模块上电同步有这样一段描述：
2 TBCLKSYNC
ePWM Module Time Base Clock (TBCLK) Sync: Allows the user to globally synchronize all enabled
ePWM modules to the time base clock (TBCLK):
0 The TBCLK (Time Base Clock) within each enabled ePWM module is stopped. (default). If,
however, the ePWM clock enable bit is set in the PCLKCR1 register, then the ePWM module will
still be clocked by SYSCLKOUT even if TBCLKSYNC is 0.
1 All enabled ePWM module clocks are started with the first rising edge of TBCLK aligned. For
perfectly synchronized TBCLKs, the prescaler bits in the TBCTL register of each ePWM module
must be set identically. The proper procedure for enabling ePWM clocks is as follows:
• Enable ePWM module clocks in the PCLKCR1 register.
• Set TBCLKSYNC to 0.
• Configure prescaler values and ePWM modes.
• Set TBCLKSYNC to 1.
关于上面这段内容的疑问就是，当the first rising edge of TBCLK 的时候，TBCTR是从0开始还是从TBCTR(这个寄存器是可以设置的)的初值开始？
我个人理解是从初值开始的，然后就把EPWM模块间的同步关掉，在 Configure prescaler values and ePWM modes步骤中，通过初值来实现不同EPWM模块的移向，但是一直无法实现，所以想知道这个方法是否可以实现不同模块间固定的相移，多谢
Tobby Guo：从现象上来看，通过TBCTR的初值无法实现错项，就是想知道为什么，多谢
