TMS320F28062(实现限流触发功能)

      你好！我们目前想实现Cycle-by-cycle（周期）的限流保护，两路比较器分别被触发后去关闭对应的PWM模块。

目前我们在使用的过程中，使用了COMP2A和COMP3A，但是实际调试过程中发现COMP3A可以正常触发去关闭PWM模块，但是COMP2A始终无法触发去关PWM模块。同时COMP2A和COMP3A这两个引脚也用于ADC采样，下面是实现该功能的详细代码配置情况，麻烦你帮忙看看。

注：后面我们把COMP1A也配置成了相同功能，但是同样不能触发

 

 EALLOW;
   SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;                 // Enable Clock to the ADC
   AdcRegs.ADCCTL1.bit.ADCBGPWD = 1;                     // Comparator shares the internal BG 

   SysCtrlRegs.PCLKCR3.bit.COMP1ENCLK = 1;    // COMP1
   SysCtrlRegs.PCLKCR3.bit.COMP2ENCLK = 1;    // COMP2
   SysCtrlRegs.PCLKCR3.bit.COMP3ENCLK = 1;    // COMP3

   EDIS;

 

 //IL2 with CMPA2
    EALLOW;
    GpioCtrlRegs.AIOMUX1.bit.AIO4 = 2;      // Configure AIO4 for CMP2A (analog input) operation
    AdcRegs.COMPHYSTCTL.bit.COMP2_HYST_DISABLE = 1;
    Comp2Regs.COMPCTL.bit.CMPINV=0;         // 0: Output of comparator,1: Inverted
    Comp2Regs.COMPCTL.bit.COMPSOURCE=0;     // connected to internal DAC
    Comp2Regs.COMPCTL.bit.SYNCSEL = 0;      // Asynchronous version of Comparator output
    Comp2Regs.COMPCTL.bit.QUALSEL = 0xF;    // filter
    Comp2Regs.COMPCTL.bit.COMPDACEN=1;      // Comparator/DAC logic is powered up
    Comp2Regs.DACVAL.all = 465;//969;         // 0-1023:0-3.3V 24A–>845,27a–>889
    EDIS;

    //IL1 with CMPA3
    EALLOW;
    GpioCtrlRegs.AIOMUX1.bit.AIO6 = 2;      // Configure AIO6 for CMP3A (analog input) operation
    AdcRegs.COMPHYSTCTL.bit.COMP3_HYST_DISABLE = 1;
    Comp3Regs.COMPCTL.bit.CMPINV=0;         // 0: Output of comparator,1: Inverted
    Comp3Regs.COMPCTL.bit.COMPSOURCE=0;     // connected to internal DAC
    Comp3Regs.COMPCTL.bit.SYNCSEL = 0;      // Asynchronous version of Comparator output
    Comp3Regs.COMPCTL.bit.QUALSEL = 0xF;    // filter
    Comp3Regs.COMPCTL.bit.COMPDACEN= 1;                 //0;     // Comparator/DAC logic is powered up
    Comp3Regs.DACVAL.all = 465;//969;             // 0-1023:0-3.3V 24A–>845,27a–>889
    EDIS;

 

  //EPWM6 DZ
    EALLOW;
   // Define an event (DCAEVT2) based on COMP3OUT
   EPwm6Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP3OUT;        // DCAH = COMP1OUT
   EPwm6Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_TZ2;        // DCAL = TZ2
   EPwm6Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP3OUT;
   EPwm6Regs.DCTRIPSEL.bit.DCBLCOMPSEL = DC_TZ2;
   EPwm6Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; // DCAEVT2 =  DCAH high, DCAL do not care;
   EPwm6Regs.TZDCSEL.bit.DCBEVT2 = TZ_DCBH_HI;
   EPwm6Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2;           // DCAEVT2 = DCAEVT2 (not filtered)
   EPwm6Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;  // Take async path
   EPwm6Regs.DCBCTL.bit.EVT2SRCSEL = DC_EVT2;
   EPwm6Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;
   // Enable DCAEVT2 as a cycle-by-cycle trip source
   // Note: DCxEVT1 events can be defined as one-shot.
   //       DCxEVT2 events can be defined as cycle-by-cycle.
   EPwm6Regs.TZSEL.bit.DCAEVT2 = 1;
   EPwm6Regs.TZSEL.bit.DCBEVT2 = 1;
   // What do we want the one-shot trip to do?
   // Because DCAEVT2 is causes a trip event
   // (in this case cycle-by-cycle) we need to use the TZA
   // the and TZB actions to force EPWM2A and EPWM2B
   // NOTE: TZA and TZB have higher priority over the
   //       DCAEVT1 action.
   EPwm6Regs.TZCTL.bit.TZA = TZ_FORCE_LO;           // EPWM2A will go low
   EPwm6Regs.TZCTL.bit.TZB = TZ_FORCE_LO;           // EPWM2B will go low

    // Enable TZ interrupt
   EPwm6Regs.TZEINT.bit.CBC = 0;//Disable CBC interrupt generation

   EDIS;

 

   //EPWM2 DZ
      EALLOW;
      // Define an event (DCAEVT2) based on COMP3OUT
      EPwm2Regs.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP2OUT;        // DCAH = COMP1OUT
      EPwm2Regs.DCTRIPSEL.bit.DCALCOMPSEL = DC_TZ2;        // DCAL = TZ2
      EPwm2Regs.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP2OUT;
      EPwm2Regs.DCTRIPSEL.bit.DCBLCOMPSEL = DC_TZ2;
      EPwm2Regs.TZDCSEL.bit.DCAEVT2 = TZ_DCAH_HI; // DCAEVT2 =  DCAH high, DCAL do not care;
      EPwm2Regs.TZDCSEL.bit.DCBEVT2 = TZ_DCBH_HI;
      EPwm2Regs.DCACTL.bit.EVT2SRCSEL = DC_EVT2;           // DCAEVT2 = DCAEVT2 (not filtered)
      EPwm2Regs.DCACTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;  // Take async path
      EPwm2Regs.DCBCTL.bit.EVT2SRCSEL = DC_EVT2;
      EPwm2Regs.DCBCTL.bit.EVT2FRCSYNCSEL = DC_EVT_ASYNC;
      // Enable DCAEVT2 as a cycle-by-cycle trip source
      // Note: DCxEVT1 events can be defined as one-shot.
      //       DCxEVT2 events can be defined as cycle-by-cycle.
      EPwm2Regs.TZSEL.bit.DCAEVT2 = 1;
      EPwm2Regs.TZSEL.bit.DCBEVT2 = 1;
      // What do we want the one-shot trip to do?
      // Because DCAEVT2 is causes a trip event
      // (in this case cycle-by-cycle) we need to use the TZA
      // the and TZB actions to force EPWM2A and EPWM2B
      // NOTE: TZA and TZB have higher priority over the
      //       DCAEVT1 action.
      EPwm2Regs.TZCTL.bit.TZA = TZ_FORCE_LO;           // EPWM2A will go low
      EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO;           // EPWM2B will go low

      // Enable TZ interrupt
      EPwm2Regs.TZEINT.bit.CBC = 0;//Disable CBC interrupt generation

      EDIS;