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msp430 使用24M cpu串口不能用

我打算基于msp430f5529lp开发板做实验,使用tirtos的uartecho例程。目前使用例程可以正常工作。但是我如果把cpu设置成非8m(8m是tirtos默认的速度),串口就会打出无效的字符。

void setupDCO(void)
{
PMM_setVCoreUp(PMM_CORE_LEVEL_1);
PMM_setVCoreUp(PMM_CORE_LEVEL_2);
PMM_setVCoreUp(PMM_CORE_LEVEL_3);
PMM_setVCore(PMMCOREV_3);

UCSCTL3 = SELREF_2; // Set DCO FLL reference = REFO
UCSCTL4 |= SELA_2; // Set ACLK = REFO

__bis_SR_register(SCG0); // Disable the FLL control loop
UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx
UCSCTL1 = DCORSEL_7; // Select DCO range 50MHz operation
UCSCTL2 = FLLD_0 + 499; // Set DCO Multiplier for 16MHz
// (N + 1) * FLLRef = Fdco
// (762 + 1) * 32768 = 25MHz
// Set FLL Div = fDCOCLK/2
__bic_SR_register(SCG0); // Enable the FLL control loop

// Worst-case settling time for the DCO when the DCO range bits have been
// changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
// UG for optimization.
// 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle
__delay_cycles(782000);

// Loop until XT1,XT2 & DCO stabilizes – In this case only DCO has to stabilize
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1&OFIFG); // Test oscillator fault flag

}

这个函数在main函数的开始处调用

int main(void)
{
setupDCO();

。。。。。。

。。。。

}

然后串口的设置是

const UARTUSCIA_BaudrateConfig uartUSCIABaudrates[] = {
/* {baudrate, input clock, prescalar, UCBRFx, UCBRSx, oversampling} */
{
.outputBaudrate = 115200,
.inputClockFreq = 16384000,
.prescalar = 4,
.hwRegUCBRFx = 7,
.hwRegUCBRSx = 0,
.oversampling = 1
},
{9600, 8192000, 53, 5, 0, 1},
{9600, 32768, 3, 0, 3, 0},
};

tirtos cpu的设置是

hwiParams.arg = 0;
halHwi.create(46, "&UARTUSCIA_hwiIntFxn", hwiParams);
BIOS.cpuFreq.lo = 8192000;
ClockFreqs.SMCLK = 16384000;
ClockFreqs.ACLK = 32768;

现象是串口打出的字符不正确。

我的问题是怎么设置,才能让cpu工作在16M或者说25M,同时串口正确的打印出来字符。

Susan Yang:

UCSCTL1 = DCORSEL_5;// Select DCO range 16MHz operation

user1894077:

回复 Susan Yang:

不好用的

user1894077:

Currently the reset and Boot module boost values are fixed, as shown below. In future releases these values may made changeable.
The default reset values for UCS-based 5xx/6xx devices are:

ACLK= 32768 HzSMCLK = 1000000 Hz

The default reset values for CS-based FR58xx/FR59xx devices are:

ACLK= 39063 HzSMCLK = 1000000 Hz

The default Boot module boost values for UCS-based 5xx/6xx devices are:

ACLK= 32768 HzSMCLK = 8192000 Hz

The default Boot module boost values for CS-based FR58x/FR59x devices are:

ACLK= 39063 HzSMCLK = 8000000 Hz
这一段话是在help里面TI-RTOS for MSP43x 2.20.00.06--》Kernel Runtime APIs and Configuration (cdoc)--》ti.sysbios.family.msp430--》ClockFreqs里面的,似乎是系统设置的强制为8192,还没有开放接口来实现。所以现在是即使我用写寄存器的方法把cpu给改到了24M或别的速度,驱动层还是会有问题。希望tirtos的工程师给个准确的回复。

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