TI中文支持网你好 MSP430FR2433 P20 P21D当作普通 I/O口，不能 正常输出，其他口都正常。
void PIN_MANAGER_Initialize()
{ PM5CTL0 &= (~(LOCKLPM5+LPM5SW));
P1OUT = 0x00 ; P1SEL1 = 0x00 ;
P1SEL0 = 0x00 ; //00000000 0=I/O function ,1=Peripheral P1DIR = 0xA8; //10101000 P10 Motor_I , P11 KEY P12 Vibrant P13 Motor_dri P14 Batt_Sam P15 Power_control P16 Light_sensor P17 NC 10010100
P2OUT = 0x00 ; // P2DIR = 0x7F; //01111101 p2.0 A7169_SCK, p2.1 A7169_SCS , p2.2 Press_Green , P2.3 match_led , p2.4 low_volt , p2.5 Led_HighTemp , p2.6 A7169_Power , p2.7 A7169_GIO1
P2SEL1 = 0 ; //00000000 P2SEL0 = 0 ;
P2IES = 0 ;
P3OUT = 0x00; //
P3SEL1 = 0x00; //00000000 P3SEL0 = 0 ;
P3DIR = 0xFF; //11111011 P3.0 Press_Yellow, p3.1 Press_red , P3.2 A7169_SDIO
asm("nop") ;}
user6107215：
现在用的 是内部晶振。把晶振印脚设置成一般IO口。不能正常输出
void OSCILLATOR_Initialize()
{__bis_SR_register(SCG0);// disable FLLCSCTL3 |= SELREF__REFOCLK;// Set REFO as FLL reference sourceCSCTL0 = 0;// clear DCO and MOD registersCSCTL1 &= ~(DCORSEL_7);// Clear DCO frequency select bits firstCSCTL1 |= DCORSEL_3;// Set DCO = 8MHzCSCTL2 = FLLD_0 + 243;// DCODIV = 8MHz__delay_cycles(3);__bic_SR_register(SCG0);// enable FLLwhile(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1));// Poll until FLL is locked
CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK;// set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz,// default DCODIV as MCLK and SMCLK source
}
Susan Yang：
请您先对照一下
回头我拿板子测试一下
灰小子：
从这段代码没看出有什么明显问题。建议提供下完整代码。
Susan Yang：
回复 user6107215:
您是否有参考过下面的代码？
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IN NO EVENT SHALL THE COPYRIGHT OWNER OR* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.**********************************************************************************MSP430 CODE EXAMPLE DISCLAIMER** MSP430 code examples are self-contained low-level programs that typically* demonstrate a single peripheral function or device feature in a highly* concise manner. For this the code may rely on the device's power-on default* register values and settings such as the clock configuration and care must* be taken when combining code from several examples to avoid potential side* effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware* for an API functional library-approach to peripheral configuration.** --/COPYRIGHT--*/ //****************************************************************************** //MSP430FR243x Demo - Configure MCLK for 8MHz sourced from DCO. // //Description: Default DCODIV is MCLK and SMCLK source. //By default, FR243x select XT1 as FLL reference. //If XT1 is present, the XIN and XOUT pin needs to configure. //If XT1 is absent, switch to select REFO as FLL reference automatically. //XT1 is considered to be absent in this example. //f(DCOCLK) = 2^FLLD * (FLLN+1) * (fFLLREFCLK / n). //FLLD = 0, FLLN =243, n=1, DIVM =1, f(DCOCLK) = 2^0 * (243+1)*32768Hz = 8MHz, //f(DCODIV) = (243+1)*32768Hz = 8MHz, //ACLK = default REFO ~32768Hz, SMCLK = MCLK = f(DCODIV) = 8MHz. //Toggle LED to indicate that the program is running. // //MSP430FR2433 //--------------- ///|\|| //| || //--|RST| //|P1.0 |---> LED //|P1.3 |---> MCLK= 8MHz //|P1.7 |---> SMCLK = 8MHz //|P2.2 |---> ACLK= 32768Hz // // //Ling Zhu //Texas Instruments Inc. //Feb 2015 //Built with IAR Embedded Workbench v6.20 & Code Composer Studio v6.0.1 //****************************************************************************** #include <msp430.h>void Software_Trim();// Software Trim to get the best DCOFTRIM value #define MCLK_FREQ_MHZ 8// MCLK = 8MHzint main(void) {WDTCTL = WDTPW | WDTHOLD;// Stop watchdog timer__bis_SR_register(SCG0);// disable FLLCSCTL3 |= SELREF__REFOCLK;// Set REFO as FLL reference sourceCSCTL1 = DCOFTRIMEN | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHzCSCTL2 = FLLD_0 + 243;// DCODIV = 8MHz__delay_cycles(3);__bic_SR_register(SCG0);// enable FLLSoftware_Trim();// Software Trim to get the best DCOFTRIM valueCSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz// default DCODIV as MCLK and SMCLK sourceP1DIR |= BIT0 | BIT3 | BIT7;// set MCLK SMCLK and LED pin as outputP1SEL1 |= BIT3 | BIT7;// set MCLK andSMCLK pin as second functionP2DIR |= BIT2;// set ACLK pin as outputP2SEL1 |= BIT2;// set ACLK pin as second functionPM5CTL0 &= ~LOCKLPM5;// Disable the GPIO power-on default high-impedance mode// to activate previously configured port settingswhile(1){P1OUT ^= BIT0;// Toggle P1.0 using exclusive-OR__delay_cycles(10000000);// Delay for 10000000*(1/MCLK)=1.25s} }void Software_Trim() {unsigned int oldDcoTap = 0xffff;unsigned int newDcoTap = 0xffff;unsigned int newDcoDelta = 0xffff;unsigned int bestDcoDelta = 0xffff;unsigned int csCtl0Copy = 0;unsigned int csCtl1Copy = 0;unsigned int csCtl0Read = 0;unsigned int csCtl1Read = 0;unsigned int dcoFreqTrim = 3;unsigned char endLoop = 0;do{CSCTL0 = 0x100;// DCO Tap = 256do{CSCTL7 &= ~DCOFFG;// Clear DCO fault flag}while (CSCTL7 & DCOFFG);// Test DCO fault flag__delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable// Suggest to wait 24 cycles of divided FLL reference clockwhile((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));csCtl0Read = CSCTL0;// Read CSCTL0csCtl1Read = CSCTL1;// Read CSCTL1oldDcoTap = newDcoTap;// Record DCOTAP value of last timenewDcoTap = csCtl0Read & 0x01ff;// Get DCOTAP value of this timedcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM valueif(newDcoTap < 256)// DCOTAP < 256{newDcoDelta = 256 - newDcoTap;// Delta value between DCPTAP and 256if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256endLoop = 1;// Stop while loopelse{dcoFreqTrim--;CSCTL1 = (csCtl1Read & (~(DCOFTRIM0+DCOFTRIM1+DCOFTRIM2))) | (dcoFreqTrim<<4);}}else// DCOTAP >= 256{newDcoDelta = newDcoTap - 256;// Delta value between DCPTAP and 256if(oldDcoTap < 256)// DCOTAP cross 256endLoop = 1;// Stop while loopelse{dcoFreqTrim++;CSCTL1 = (csCtl1Read & (~(DCOFTRIM0+DCOFTRIM1+DCOFTRIM2))) | (dcoFreqTrim<<4);}}if(newDcoDelta < bestDcoDelta)// Record DCOTAP closest to 256{csCtl0Copy = csCtl0Read;csCtl1Copy = csCtl1Read;bestDcoDelta = newDcoDelta;}}while(endLoop == 0);// Poll until endLoop == 1CSCTL0 = csCtl0Copy;// Reload locked DCOTAPCSCTL1 = csCtl1Copy;// Reload locked DCOFTRIMwhile(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked }
gaoyang9992006：
你的代码好像没有将这两个端口全部设置为输出。
