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TMS320F28035: dsp28035 能接收扩展帧，接收不了标准帧

2024-10-26 分类：C2000™ 32位实时 MCU 阅读(67)

Part Number:TMS320F28035

请教一个问题，dsp28035 能接收扩展帧，接收不了标准帧？

目前，扩展帧能发送、能接收。

标准帧能发送，不能接收。

static void InitControl(Uint16 buadrate) // Initialize eCAN-A module
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents or return
false data. */

struct ECAN_REGS ECanaShadow;

EALLOW; // EALLOW enables access to protected bits

/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/

ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
ECanaShadow.CANTIOC.bit.TXFUNC = 1;//发送引脚功能
ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;

ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
ECanaShadow.CANRIOC.bit.RXFUNC = 1;//接收引脚功能
ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;

/* Configure eCAN for HECC mode – (reqd to access mailboxes 16 thru 31) */
// HECC mode also enables time-stamping feature

ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.SCB = 1;//ECAN模式 32个邮箱
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

/* Initialize all bits of 'Message Control Register' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero
ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;

// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
// as a matter of precaution.

ECanaRegs.CANTA.all = 0xFFFFFFFF; /* Clear all TAn bits *///重置CANTA或清除发送中断

ECanaRegs.CANRMP.all = 0xFFFFFFFF; /* Clear all RMPn bits *///清除接收邮箱消息挂起寄存器

ECanaRegs.CANGIF0.all = 0xFFFFFFFF; /* Clear all interrupt flag bits */
ECanaRegs.CANGIF1.all = 0xFFFFFFFF;

/* Configure bit timing parameters for eCANA*///请求Bit-Timing 、掩码寄存器等参数

ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

// Wait until the CPU has been granted permission to change the configuration registers
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..

ECanaShadow.CANBTC.all = 0;
/* The following block is only for 60 MHz SYSCLKOUT. */

if (buadrate == BUADRATE250K)
{
ECanaShadow.CANBTC.bit.BRPREG = 11;
}
else if (buadrate == BUADRATE500K)
{
ECanaShadow.CANBTC.bit.BRPREG = 5;
}
else if (buadrate == BUADRATE1000K)
{
ECanaShadow.CANBTC.bit.BRPREG = 2;
}
else
{
ECanaShadow.CANBTC.bit.BRPREG = 11;
}
ECanaShadow.CANBTC.bit.TSEG2REG = 1;
ECanaShadow.CANBTC.bit.TSEG1REG = 6;

ECanaShadow.CANBTC.bit.SAM = 1;
ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;

ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.ABO = 1;//自动恢复总线
ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0 配置完成后请求正常运行
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

// Wait until the CPU no longer has permission to change the configuration registers
do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..

/* Disable all Mailboxes */
ECanaRegs.CANME.all = 0; // Required before writing the MSGIDs

EDIS;
}

void InitMbox(void)
{
canMsgBufInit();
ECanaMboxes.MBOX0.MSGID.all = (Uint32)(canMsgTxBuf[0].id << 18);
ECanaMboxes.MBOX1.MSGID.all = (Uint32)(canMsgTxBuf[1].id << 18);
ECanaMboxes.MBOX2.MSGID.all = (Uint32)(canMsgTxBuf[2].id << 18);
// ECanaMboxes.MBOX3.MSGID.all = (Uint32)(canMsgTx[3].id | 0x80000000);
// ECanaMboxes.MBOX4.MSGID.all = (Uint32)(canMsgTx[4].id | 0x80000000);
// ECanaMboxes.MBOX5.MSGID.all = (Uint32)canMsgTx[5].id << 18;
// ECanaMboxes.MBOX6.MSGID.all = (Uint32)canMsgTx[6].id << 18;
// ECanaMboxes.MBOX7.MSGID.all = (Uint32)canMsgTx[7].id << 18;
// ECanaMboxes.MBOX8.MSGID.all = (Uint32)canMsgTx[8].id << 18;
// ECanaMboxes.MBOX9.MSGID.all = (Uint32)canMsgTx[9].id << 18;
// ECanaMboxes.MBOX10.MSGID.all = (Uint32)canMsgTx[10].id << 18;
// ECanaMboxes.MBOX11.MSGID.all = (Uint32)canMsgTx[11].id << 18;
// ECanaMboxes.MBOX12.MSGID.all = (Uint32)canMsgTx[12].id << 18;
// ECanaMboxes.MBOX13.MSGID.all = (Uint32)canMsgTx[13].id << 18;
// ECanaMboxes.MBOX14.MSGID.all = (Uint32)canMsgTx[14].id << 18;
// ECanaMboxes.MBOX15.MSGID.all = (Uint32)canMsgTx[15].id << 18;

// Write to the MSGID field of RECEIVE mailboxes MBOX16 – 31
ECanaMboxes.MBOX16.MSGID.all = (Uint32)(canMsgRxBuf[0].id << 18);
ECanaMboxes.MBOX17.MSGID.all = (Uint32)(canMsgRxBuf[1].id | 0x80000000);
// ECanaMboxes.MBOX18.MSGID.all = (Uint32)(canMsgRx[2].id | 0x80000000);
// ECanaMboxes.MBOX19.MSGID.all = (Uint32)(canMsgRx[3].id | 0x80000000);
// ECanaMboxes.MBOX20.MSGID.all = (Uint32)(canMsgRx[4].id | 0x80000000);
// ECanaMboxes.MBOX21.MSGID.all = (Uint32)(canMsgRx[5].id | 0x80000000);
// ECanaMboxes.MBOX22.MSGID.all = (Uint32)(canMsgRx[6].id | 0x80000000);
// ECanaMboxes.MBOX23.MSGID.all = (Uint32)(canMsgRx[7].id | 0x80000000);
// ECanaMboxes.MBOX24.MSGID.all = 0x9555AAA8;
// ECanaMboxes.MBOX25.MSGID.all = 0x9555AAA9;
// ECanaMboxes.MBOX26.MSGID.all = 0x9555AAAA;
// ECanaMboxes.MBOX27.MSGID.all = 0x9555AAAB;
// ECanaMboxes.MBOX28.MSGID.all = 0x9555AAAC;
// ECanaMboxes.MBOX29.MSGID.all = 0x9555AAAD;
// ECanaMboxes.MBOX30.MSGID.all = 0x9555AAAE;
// ECanaMboxes.MBOX31.MSGID.all = 0x9555AAAF;

// Configure Mailboxes 0-15 as Tx, 16-31 as Rx
// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
ECanaRegs.CANMD.all = 0xFFFF0000;//指定mbox 0-15为发送， 16-31为接收

// Enable all Mailboxes 使能所有邮箱*/
// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
ECanaRegs.CANME.all = 0xFFFFFFFF;

// Specify that 8 bits will be sent/received
ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX10.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX11.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX12.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX13.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX14.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8;

ECanaMboxes.MBOX16.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX17.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX18.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX19.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX20.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX21.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX22.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX23.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX24.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX25.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX26.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX27.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX28.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX29.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX30.MSGCTRL.bit.DLC = 8;
ECanaMboxes.MBOX31.MSGCTRL.bit.DLC = 8;

// Since this write is to the entire register (instead of a bit
// field) a shadow register is not required.
EALLOW;
ECanaRegs.CANMIM.all = 0;//禁能中断
EDIS;

// Configure the eCAN for self test mode
// Enable the enhanced features of the eCAN.
// EALLOW;
// ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
// ECanaShadow.CANMC.bit.STM = 1; // Configure CAN for self-test mode
// ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
// EDIS;
}

user5860441：

void canMsgBufInit(void){ //发送邮箱初始化 canMsgTxBuf[0].id = 0x1; canMsgTxBuf[0].MsgData.dataH.all = 0; canMsgTxBuf[0].MsgData.dataL.all = 0; canMsgTxBuf[1].id = 0x11; canMsgTxBuf[1].MsgData.dataH.all = 0; canMsgTxBuf[1].MsgData.dataL.all = 0;

canMsgTxBuf[2].id = 0x713; canMsgTxBuf[2].MsgData.dataH.all = 0; canMsgTxBuf[2].MsgData.dataL.all = 0;

//接收邮箱初始化 canMsgRxBuf[0].id = 0x121; canMsgRxBuf[0].flag = 0; canMsgRxBuf[0].MsgData.dataH.all = 0x12345678; canMsgRxBuf[0].MsgData.dataL.all = 0x56781234;

canMsgRxBuf[1].id = 0x122; canMsgRxBuf[1].flag = 0; canMsgRxBuf[1].MsgData.dataH.all = 0x1234ABCD; canMsgRxBuf[1].MsgData.dataL.all = 0x56789AEF;}

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