TI中文支持网Part Number:PROCESSOR-SDK-AM64X
Hi, I'm having some trouble configuring GPIO interrupts.When I configured the GPIO_39, I didn't know how the GPIO_INTR_NUM was determined.
I've tried testing from CSLR_R5FSS8 CORED_INTR_MAIN GPIOMUX_INTROUTERO OUTP_0 to CSLR_R5FSS8 CORED_INTR_MAIN GPIOMUX_INTROUTERO OUTP_15, but Sciclient_ rmIrgSet is returning an error.
How do I determine the rmIrgReq.src index and rmIrgReq.dst_host_irg?
SDK VERSION: mcu_plus_sdk_am64x_08_03_00_18
Gary Lu：
Hello bin，
I suggest you refer to the GPIO section of this document：AM64x Document
Regards，
Gary
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huang bin：
AM64x Document does not specify the specific assignment, can you tell me how to configure it?
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huang bin：
I ran the GPIO INTERRUPT demo, GPIO_43, also initialization failed, very troublesome.
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Gary Lu：
I have consulted with a senior product line engineer for you, which will take some time
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Gary Lu：
This problem has been fixed in older MCU+SDK versions, and please look at the below FAQ, which clearly explains what the problem is and how to fix it.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1198105/faq-am64x-how-to-run-mcu-sdk-gpio_input_interrupt-example-for-r5fss0-0-with-linux-running-on-a53
Some of the FAQ's clearly explain GPIO interrupts, and please look at them as well for your reference.
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1196137/faq-sk-am62-how-to-configure-the-gpio-interrupt-on-am62x-in-mcu-sdk
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1260818/faq-am64x-am62x-how-do-i-route-the-same-gpio-bank-interrupts-to-different-destination-cores
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1236579/faq-am64x-how-to-route-mcu-gpio-interrupts-to-main-domain-cores-in-mcu-plus-sdk-version-6-0-above
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1232526/faq-am6442-gpio-input-interrupt-sciclient-config-failed-in-mcu-plus-sdk-version-6-0-above/4655897#4655897
