RE: CC1312R: SUB1G发送数据丢帧严重-TI中文支持网

Other Parts Discussed in Thread:CC1312R, CC1310, SYSCONFIG, LAUNCHXL-CC1310, LAUNCHXL-CC1312R1

我这边确实无法上传任何格式的文件，如果方便的话您可以提供一下邮箱么？

Galaxy Yue：

情况描述：SmartRF Studio 7 CC1310 接收，因为我们已经有在售成熟的产品在用IAR开发，必须基于这个接收，但是目前CC1312R开发您那边不支持IAR的开发，只能转到CCS平台开发，但是CCS开发只能用CCS syscfg配置进行配置，都是1312发送1310接收。CC1310和CC1312是基于不同配置平台进制配置的，现在要进行一收一发，这样不能实现么？同样基于同一个配置平台配置么？目前只能修改CC1312来适配1310接收。频段我们已经固定了。现在就是丢帧严重，为了防止您怀疑我们的样板有问题，目前使用官方例程测试样板的收发功能，验证无误丢帧极少，而且所有使用的软件平台更新到最新了。

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Galaxy Yue：

您这边使用什么 PHY 和频率？

CC1310和CC1312R都是定制板吗？

您能否在两个 CC1310 和两个 CC1312R 之间获取数据包？

当你说他们有“帧丢失”时，他们是丢失了所有数据包还是收到了一些数据包？

可以说一下丢失占比或者频率这样，更准确的

如果 CC1310 和 CC1312 使用正确的设置，它们应该能够进行通信。

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Galaxy Yue：

为了更快的解决问题，您需要提供一些如上回复的信息。

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Galaxy Yue：

请问您这个问题已经得到解决了吗？

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zjj12138：

并没有，您那边也没有提供标准的配置方式，我这边无法确定是哪些参数忽略了，希望您那边能够提供正确的配置方式方便我找问题作为参考谢谢

Galaxy Yue 说：请问您这个问题已经得到解决了吗？

因为遇到了两个疑难问题，所以没有在得到准确有用的信息的时候没有回信息。另一个问题已经解决了，就省这一个关键问题了，还望予以协助，万分感谢

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zjj12138：

Galaxy Yue 说：可以说一下丢失占比或者频率这样，更准确的

丢失占比再三分之二以上，我也知道如果CC1310和CC1312配置完全一样应该不会出现丢失的现象，但是现在出现了，我现在就在怀疑配置参数方便有忽略的地方，但是您那边始终坚持硬件审核，不予提供正确的配置方式。我也没有任何办法。

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Galaxy Yue：

收到您补充的信息，继续为您跟进。

正在核查sysconfig 的参数问题

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zjj12138：

您那边可以不只审核我么？可以告诉我正确的配置方式么？我用排除法把不再查找已知的正确的配置参数，那样也能帮助我尽快找到问题。但是您那边时钟不提供正确的参考，让我很盲目的的各种尝试。

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Galaxy Yue：

我不明白您说的审核您是什么意思，我周末都在跟进这个帖子。

因为这边的方案不太符合您的要求，

我已经升到英文论坛那边，也已经将您的需求需要正确的参数明确告知英文论坛那边的工程师。

您也是知道的，存在一些时差，我这边也在复现您出现的问题。

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Galaxy Yue：

现在帖子仅仅关于您这个SUB1G发送数据丢帧严重的问题，已经将认为参数不正确，需要正确的参数这个需求明确地表达在英文论坛团队。

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zjj12138：

Galaxy Yue 说：我不明白您说的审核您是什么意思

您不停的让我这边提供的的配置参数，却又不提供什么是正确的。我提供的参数及文件我都认为是需要您那边审核的。

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zjj12138：

Galaxy Yue 说：现在帖子仅仅关于您这个SUB1G发送数据丢帧严重的问题

我们也不是刚用这个类型的芯片，怎么说呢，可以认为不是丢失验证，可以认为是SmartRF Studio 7和TI system Configurtion两个软件配置的设备不能够完全互通，我的问题是SmartRF Studio 7配置的CC1310设备已经正常在售卖了，虽然也有一点问题但是不至于如此严重，为了规避CC1310上出现的问题我们开始使用CC1312但是你们对IAR的技术支持太少，所以我们改用CCS，但是CCS使用的是TI system Configurtion，我们必须尽一切可能去向CC1310的接收去兼容，现在试CC1312发出的数据CC1310接收率只有不到30%.问题特别严重。现在是非常急切的需要一个正确的标准的配置作为参考找出问题所在。但是你们始终没有提供正确的标准。让我们非常头疼

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Galaxy Yue：

目前我和英文team那边还没解决，我们会尽快的，有消息会通知您的。

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zjj12138：

没解决是没复现出问题，还是复现出问题没有解决方案？

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Galaxy Yue：

我看到你们使用的是长距离 5 kbps PHY，但你们已将符号率从 20 ksps 更改为 40 ksps，并将接收器带宽更改为 77.7 kHz。我们还没有使用这些设置来描述我们的收音机。因此，我们无法为你们提供任何设置。如果你们使用默认 PHY 且不做任何更改，CC1310 和 CC1312R 应该能够毫无问题地进行通信。

你们是否尝试过使用默认的 5 kbps 远程 PHY 而不进行任何更改？

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zjj12138：

问题是我们卖出去的设备已经投入使用了，如果要更改我们之前的产品的售后将无法预计，而且还要重新匹配天线。现实不允许我们做如此大的变更，如果只是初期验证我们不排斥您的建议。我们也可以尝试您说的，但是我们可能没有办法采用。而且本周五样品必须出来发给用户，现在很麻烦

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zjj12138：

Galaxy Yue 说：你们是否尝试过使用默认的 5 kbps 远程 PHY 而不进行任何更改？

我刚刚吧CC1312和1310的参数都改成了默认的，868没做任何更改，也是一样的效果，接收到的数据比较少

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Galaxy Yue：

多方判断认为还是硬件问题，

在这边测试是可以正常收到所有数据的。

我仍在继续跟进

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Galaxy Yue：

Try the 50 kbps PHY first.

您的硬件审核进展如何

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Galaxy Yue：

你们的设计基于哪些参考设计？

我看到你们正在使用 TCXO。你能分享这个的零件号吗？

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Galaxy Yue：

您是否进行了硬件审核，麻烦给出提交时间

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zjj12138：

不要再说硬件审核了，我现在改用官方开发板了。效果也是一样的。而且硬件审核不是你那边帮忙提交的么？

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Galaxy Yue：

我之前和您沟通过，硬件审核需要由公司个人提交，我们不负责提交。

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Galaxy Yue：

明白，现在是开发板一样的情况，使用的都是默认参数，有尝试过50 kbps the PHY 吗？

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zjj12138：

是的，您建议我的全都做了尝试，现在结果并不乐观。这个问题已经困扰太久了，今天就要提供样品了，您还在关心硬件审核，我只能用开发板来尝试避开硬件审核这个环节，让你们真正意识到问题而着手去解决问题而不是一直纠结在硬件审核这一问题上

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Galaxy Yue：

了解您的进程很赶，我非常想尽快解决您的问题，每次收到英文team的回复我都是第一时间给您回复。

为了更快更有效地解决问题，麻烦您对默认参数进行尝试一下。

请问您使用开发板，默认参数，通信正常但数据丢包仍在2/3左右，对吗？

有进行尝试过50 kbps PHY吗，结果如何

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zjj12138：

是的，是的，是的，重要的事情说三遍，再次强调也有可能不是丢包，SmartRF studio 7这个软件可以接收到，但是下载到CC1310开发板上的程序丢包严重。再次解释为了避免您怀疑我的程序有问题，我再次强调全是官方例程。您建议我50 kbps PHY，已经尝试过了，千真万确，我不会拿自己的项目开玩笑。您反复询问我反复回答，再次确认，您的所有建议我全部都尝试过了，效果并不是想象的那样。我不知道您什么时间才能恢复，我也不会时时刻刻等待刷新页面，我也会自己想办法去解决，但是您的问题一来一回就不知道要多久，希望您吧时间放在解决问题上，而不是反复问我什么建议尝试过了么？我只要看淡您的而建议我就会立刻马不停蹄的去尝试，我也想快速解决问题。

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Shuyang Zhong：

Hi zjj12138,

您好，我是Galaxy的同事，我叫Shuyang。请问您怎么称呼，直接称呼ID感觉有点怪，哈哈~

以下几个问题能否麻烦您再确认一下？我刚看到这个帖子，有些问题可能和之前Galaxy问您的重复了，不过为了更好地理解您的问题，还是麻烦您回复一下，不便之处请您谅解。

1. 您尝试过50kbps PHY，是在Launchpad开发板上还是在您自己的板子上尝试的？开发板具体型号可以发我一下吗？50kbps配置的截图也请发一下，我收到后可以根据您的配置尝试复现您的问题；

2. 您自己的板子是1312还是1310？如果收发两端都用同样的芯片，在SmartRF Studio里采用相同的物理层配置，结果如何？丢包率的截图可以发一下吗？

以上问题主要是为了隔离定位硬件问题还是软件问题，我做了一个简单的实验，发射端使用LAUNCHXL-CC1312R1，接收端使用LAUNCHXL-CC1310，两边均使用SmartRF Studio中的50kbps配置，频率为868MHz。两个板子放在同一个桌子上测试丢包率为0。

您有条件的话能否重复一下我的测试，把丢包率结果截个图？因为如果用开发板+SmartRF Studio仍然如您所说有2/3的丢包率的话，后续的探讨就都没有意义了，谢谢！

Best regards,

Shuyang

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zjj12138：

请原谅我急切的心情，已经影响到我的预期和态度，表示万分抱歉。但是我还是要再一次解释我的问题，CC1312开发板做发送端，CC1310做接收端，第二您这种方式接受发送是没有问题的，要实际运行应用程序，运行程序会发生有三分之二的数据包接收不到。如果单纯的使用SmartRF Studio来收发我这边也没有问题，您那边现在也没弄明白我的问题，是怎么来给我建议的呢。

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Shuyang Zhong：

理解您的心情，我们也是非常重视这个问题，想尽快帮您解决。

1. 您是用SmartRF Studio做过实验确认没问题了是吗？

2. 之前您和Galaxy说尝试50kbps有问题，具体是怎么操作的？还是说之前的结论有偏差？

3. 您说的实际运行程序，具体是什么程序能共享给我吗？我这边可以帮您尝试复现。

谢谢。

Best regards,

Shuyang

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zjj12138：

1：从一个星期以前，我就使用SmartRF Studio这个软件来接收确认没有问题，无论是你们默认的配置还有我指的选择的配置，无论是官方开发板还是自制电路板都是没有问题的，但是你们始终坚持对硬件进行审核，我没有任何理由说我的自制电路板没有任何问题，所以万分紧急的情况下，使用你们官方加法板验证效果依然，再次强调如果要使用SmartRF Studio软件，是复现不出问题的，而且现实情况我们不能吧该软件放在用户电脑上，我们最终还是要将应用程序下载到电路班里面你来接收。

2：您推荐的默认配置我也尝试过SmartRF Studio接收没有问题，但是程序下载到开发版里面就有三分之二以上的数据包接收不到。

3：之前的回复中已经提到了为了防止您对我的应用程序进行审核，我早已用你们官方例程进行了验证。也是你有三分之二的数据接收不到。如果您确认要使用我个人程序，光验证我的射频是可以的，但是其他功能没有我的硬件您那边如何进行验证呢，我的应用程序也很简单根据你们例程做一点修改就出来了，也没有什么可保密的。再补充一点就是，使用我的你应用程序配合我自制的硬件发送，用SmartRF Studio软件来接收也是极少丢失的

zjj12138 说：再次解释为了避免您怀疑我的程序有问题，我再次强调全是官方例程

4：重复的问题反复确认我也会反复回复，重复询问得到的答案依然还会是那个结果。因为我现在已经无计可施

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zjj12138：

以上是我我开发板未做任何改动。还有官方例程未做任何改动，包括默认配置，一个标点符号也没改，下面是打开后射频的描述，数据很少能接受到。还请给出一些建议。

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Shuyang Zhong：

rfWakeOnRadioTx和rfEasyLinkRx是不能互相通信的，因为EasyLink是一套数据格式，格式中是有地址、header和payload的。而rfWakeOnRadioTx发送的是纯物理层的包，其中payload是程序随机产生的。您能收到一些包可能是随机产生的payload正好对上EasyLink格式中的地址了。

跟rfEasyLinkRx对应的是rfEasyLinkTx例程，由于CC13x2 SDK6.30之后EasyLink已经取消了，所以最后一版含有EasyLink例程的SDK是6.20。您可以从下面链接下载6.20SDK，然后运行rfEasyLinkTx例程：

https://www.ti.com/tool/download/SIMPLELINK-CC13XX-CC26XX-SDK/6.20.00.29

下面压缩包中的视频是我用CC1312R和CC1310开发板做的实验，其中CC1312R运行rfEasyLinkTx例程，CC1310运行rfEasyLinkRx例程。从闪灯频率来看双方是同步的，说明每个包都收到了。

IMG_5719.7z

对SDK中例程的介绍可以进一步参考以下文档：

https://dev.ti.com/tirex/explore/content/simplelink_cc13x0_sdk_4_20_02_07/docs/proprietary-rf/proprietary-rf-users-guide/proprietary-rf-guide/examples-cc13x0.html#examples-user-s-guide

或者阅读每一个例程文件夹中的readme文件。

Best regards,

Shuyang

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zjj12138：

您说的不是数据包的内容，而是空中看不到的一些配置中默认的一套数据格式是么？如果您说的数据格式是我发送的数据包内的数据，这个数据是可以更改的啊，如果您说的是内部的一套传输协议，那么我们的接收已经现场使用了，后期只能用

Shuyang Zhong 说：rfEasyLinkTx

Shuyang Zhong 说：rfEasyLinkRx

以上两个例程作为基础进行修改么？其他例程最基础都会出现接收问题是么？

rfWakeOnRadioTx和rfEasyLinkRx是不能互相通信的那么rfpacketTX和rfEasyLinkRx也是无法通讯的对吧？

你们对rfEasyLink相关不在进行更新匹配了是么？如果停止部分产品的更新那么

还有一个问题就是CC1310使用CCS打开如何修改，我每次修改后编译后就又回到原来的配置了，而且这个也没有TI system Configuration 软件，还是使用SmartRF Studio 7么？但是又没有XML文件

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zjj12138：

Shuyang Zhong 说：6.20SDK

使用6.20SDK里面的EASYLINK例程修改了配置和原来的CC1310通讯，依然还是很多收不到。我下载了simplelink_cc13x2_26x2_sdk_2_40_00_81，去测试EasyLink例程，也是很多丢的，使用我个人的配置

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zjj12138：

尝试了一天，各种修改和尝试，用自己的配置始终是通讯不畅，这是我老产品的配置，有什么不对么？无论怎么移植修改配置，始终都是通讯不畅

6278.smartrf_settings.c

//********************************************************************************* // Generated by SmartRF Studio version 2.11.0 (build#126) // The applied template is compatible with CC13x0 SDK 2.30.xx.xx // Device: CC1310 Rev. 2.1 // //*********************************************************************************//********************************************************************************* // Parameter summary // Address: 0// Address0: 0xAA// Address1: 0xBB// Frequency: 497.80000 MHz // Data Format: Serial mode disable// Deviation: 5.000 kHz // pktLen: 30// 802.15.4g Mode: 0// Select bit order to transmit PSDU octets:: 1// Packet Length Config: Variable// Max Packet Length: 255// Packet Length: 13// Packet Data: 255// RX Filter BW: 78 kHz // Symbol Rate: 39.99939 kBaud // Sync Word Length: 32 Bits// TX Power: 12 dBm (requires define CCFG_FORCE_VDDR_HH = 0 in ccfg.c, see CC13xx/CC26xx Technical Reference Manual) // Whitening: No whitening#include <ti/devices/DeviceFamily.h> #include DeviceFamily_constructPath(driverlib/rf_mailbox.h) #include DeviceFamily_constructPath(driverlib/rf_common_cmd.h) #include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h) #include <ti/drivers/rf/RF.h> #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_sl_longrange.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_sl_longrange.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_mce_sl_longrange.h) #include "smartrf_settings.h"// TI-RTOS RF Mode Object RF_Mode RF_prop = {.rfMode = RF_MODE_PROPRIETARY_SUB_1,.cpePatchFxn = &rf_patch_cpe_sl_longrange,.mcePatchFxn = &rf_patch_mce_sl_longrange,.rfePatchFxn = &rf_patch_rfe_sl_longrange, };// Overrides for CMD_PROP_RADIO_DIV_SETUP uint32_t pOverrides[] = {// override_use_patch_simplelink_long_range.xml// PHY: Use MCE RAM patch, RFE RAM patchMCE_RFE_OVERRIDE(1,0,0,1,0,0),// override_synth_prop_430_510_div10_lbw60k.xml// Synth: Set recommended RTRIM to 7HW_REG_OVERRIDE(0x4038,0x0037),// Synth: Set Fref to 4 MHz(uint32_t)0x000684A3,// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4020,0x7F00),// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4064,0x0040),// Synth: Configure fine calibration setting(uint32_t)0xB1070503,// Synth: Configure fine calibration setting(uint32_t)0x05330523,// Synth: Set loop bandwidth after lock to 60 kHz(uint32_t)0x40410583,// Synth: Set loop bandwidth after lock to 60 kHz(uint32_t)0x32CC0603,// Synth: Set loop bandwidth after lock to 60 kHz(uint32_t)0x00010623,// Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)ADI_REG_OVERRIDE(1,4,0x9F),// Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),// Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering(uint32_t)0x02010403,// Synth: Configure extra PLL filtering(uint32_t)0x00108463,// Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)(uint32_t)0x04B00243,// override_synth_disable_bias_div10.xml// Synth: Set divider bias to disabledHW32_ARRAY_OVERRIDE(0x405C,1),// Synth: Set divider bias to disabled (specific for loDivider=10)(uint32_t)0x18000280,// override_phy_rx_aaf_bw_0xd.xml// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),// override_phy_gfsk_rx.xml// Rx: Set LNA bias current trim offset to 3(uint32_t)0x00038883,// Rx: Freeze RSSI on sync found eventHW_REG_OVERRIDE(0x6084,0x35F1),// override_phy_gfsk_pa_ramp_agc_reflevel_0x16.xml// Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x16.HW_REG_OVERRIDE(0x6088,0x4116),// Tx: Configure PA ramping settingHW_REG_OVERRIDE(0x608C,0x8213),// override_phy_long_range_dsss2.xml// PHY: Configure DSSS SF=2HW_REG_OVERRIDE(0x505C,0x0100),// override_phy_rx_rssi_offset_neg2db.xml// Rx: Set RSSI offset to adjust reported RSSI by -2 dB (default: 0), trimmed for external bias and differential configuration(uint32_t)0x000288A3,(uint32_t)0xFFFFFFFF };// CMD_PROP_RADIO_DIV_SETUP // Proprietary Mode Radio Setup Command for All Frequency Bands rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup = {.commandNo = 0x3807,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.modulation.modType = 0x1,.modulation.deviation = 0x14,.symbolRate.preScale = 0xF,.symbolRate.rateWord = 0x6666,.symbolRate.decimMode = 0x0,.rxBw = 0x23,.preamConf.nPreamBytes = 0x2,.preamConf.preamMode = 0x0,.formatConf.nSwBits = 0x20,.formatConf.bBitReversal = 0x0,.formatConf.bMsbFirst = 0x0,.formatConf.fecMode = 0x8,.formatConf.whitenMode = 0x0,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.analogCfgMode = 0x0,.config.bNoFsPowerUp = 0x0,.txPower = 0x784E,.pRegOverride = pOverrides,.centerFreq = 0x01F1,.intFreq = 0x8000,.loDivider = 0x0A };// CMD_FS // Frequency Synthesizer Programming Command rfc_CMD_FS_t RF_cmdFs = {.commandNo = 0x0803,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.frequency = 0x01F1,.fractFreq = 0xCCCD,.synthConf.bTxMode = 0x0,.synthConf.refFreq = 0x0,.__dummy0 = 0x00,.__dummy1 = 0x00,.__dummy2 = 0x00,.__dummy3 = 0x0000 };// CMD_PROP_TX // Proprietary Mode Transmit Command rfc_CMD_PROP_TX_t RF_cmdPropTx = {.commandNo = 0x3801,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bVarLen = 0x1,.pktLen = 0x0D,.syncWord = 0x00000000,.pPkt = 0 // INSERT APPLICABLE POINTER: (uint8_t*)&xxx };// CMD_PROP_RX // Proprietary Mode Receive Command rfc_CMD_PROP_RX_t RF_cmdPropRx = {.commandNo = 0x3802,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bRepeatOk = 0x0,.pktConf.bRepeatNok = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bVarLen = 0x1,.pktConf.bChkAddress = 0x0,.pktConf.endType = 0x0,.pktConf.filterOp = 0x0,.rxConf.bAutoFlushIgnored = 0x0,.rxConf.bAutoFlushCrcErr = 0x0,.rxConf.bIncludeHdr = 0x1,.rxConf.bIncludeCrc = 0x0,.rxConf.bAppendRssi = 0x0,.rxConf.bAppendTimestamp = 0x0,.rxConf.bAppendStatus = 0x1,.syncWord = 0x00000000,.maxPktLen = 0xFF,.address0 = 0xAA,.address1 = 0xBB,.endTrigger.triggerType = 0x1,.endTrigger.bEnaCmd = 0x0,.endTrigger.triggerNo = 0x0,.endTrigger.pastTrig = 0x0,.endTime = 0x00000000,.pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx.pOutput = 0 // INSERT APPLICABLE POINTER: (uint8_t*)&xxx };

497.8MHz.xml

<?xml version="1.0" encoding="ISO-8859-1"?> <!DOCTYPE configuration SYSTEM "C:/Program Files (x86)/Texas Instruments/SmartRF Tools/SmartRF Studio 7/config/xml/configdata.dtd"[]> <dcpanelconfiguration><Devicename>CC1310_PG21</Devicename><Description>Saved configuration data</Description><Patch><Define>RF_MODE_PROPRIETARY_SUB_1</Define><Cpe>rf_patch_cpe_sl_longrange</Cpe><Mce>rf_patch_mce_sl_longrange</Mce><Rfe>rf_patch_rfe_sl_longrange</Rfe></Patch><commandsettings><Command name="CMD_TX_TEST"><Field name="commandNo">0x00000808</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="config">0x0000000a</Field><Field name="txWord">0x0000aaaa</Field><Field name="endTrigger">0x00000001</Field><Field name="syncWord">0x00000000</Field><Field name="endTime">0x00000000</Field></Command><Command name="CMD_SYNC_STOP_RAT"><Field name="commandNo">0x00000809</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="rat0">0x00000000</Field></Command><Command name="CMD_SYNC_START_RAT"><Field name="commandNo">0x0000080a</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="rat0">0x00000000</Field></Command><Command name="CMD_STOP"><Field name="commandNo">0x00000402</Field></Command><Command name="CMD_SCH_IMM"><Field name="commandNo">0x00000810</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="cmdrVal">0x00000000</Field><Field name="cmdstaVal">0x00000000</Field></Command><Command name="CMD_RX_TEST"><Field name="commandNo">0x00000807</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="config">0x00000004</Field><Field name="endTrigger">0x00000001</Field><Field name="syncWord">0x00000000</Field><Field name="endTime">0x00000000</Field></Command><Command name="CMD_RADIO_SETUP"><Field name="commandNo">0x00000802</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="mode">0x00000001</Field><Field name="loDivider">0x00000000</Field><Field name="config">0x00000000</Field><Field name="txPower">0x00000000</Field><Field name="pRegOverride">0x00000000</Field></Command><Command name="CMD_PROP_TX_ADV"><Field name="commandNo">0x00003803</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="pktConf">0x00000000</Field><Field name="numHdrBits">0x00000010</Field><Field name="pktLen">0x0000000d</Field><Field name="startConf">0x00000000</Field><Field name="preTrigger">0x00000000</Field><Field name="preTime">0x00000000</Field><Field name="syncWord">0x00000000</Field><Field name="pPkt">0x00000000</Field></Command><Command name="CMD_PROP_TX"><Field name="commandNo">0x00003801</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="pktConf">0x00000018</Field><Field name="pktLen">0x0000000d</Field><Field name="syncWord">0x00000000</Field><Field name="pPkt">0x00000000</Field></Command><Command name="CMD_PROP_RX_SNIFF"><Field name="commandNo">0x00003808</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="pktConf">0x00000000</Field><Field name="rxConf">0x00000000</Field><Field name="syncWord">0x00000000</Field><Field name="maxPktLen">0x00000000</Field><Field name="address0">0x00000000</Field><Field name="address1">0x00000000</Field><Field name="endTrigger">0x00000000</Field><Field name="endTime">0x00000000</Field><Field name="pQueue">0x00000000</Field><Field name="pOutput">0x00000000</Field><Field name="csConf">0x00000000</Field><Field name="rssiThr">0x00000000</Field><Field name="numRssiIdle">0x00000000</Field><Field name="numRssiBusy">0x00000000</Field><Field name="corrPeriod">0x00000000</Field><Field name="corrConfig">0x00000000</Field><Field name="csEndTrigger">0x00000000</Field><Field name="csEndTime">0x00000000</Field></Command><Command name="CMD_PROP_RX_ADV_SNIFF"><Field name="commandNo">0x00003809</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="pktConf">0x00000000</Field><Field name="rxConf">0x00000000</Field><Field name="syncWord0">0x00000000</Field><Field name="syncWord1">0x00000000</Field><Field name="maxPktLen">0x00000000</Field><Field name="hdrConf">0x00000000</Field><Field name="addrConf">0x00000000</Field><Field name="lenOffset">0x00000000</Field><Field name="endTrigger">0x00000000</Field><Field name="endTime">0x00000000</Field><Field name="pAddr">0x00000000</Field><Field name="pQueue">0x00000000</Field><Field name="pOutput">0x00000000</Field><Field name="csConf">0x00000000</Field><Field name="rssiThr">0x00000000</Field><Field name="numRssiIdle">0x00000000</Field><Field name="numRssiBusy">0x00000000</Field><Field name="corrPeriod">0x00000000</Field><Field name="corrConfig">0x00000000</Field><Field name="csEndTrigger">0x00000000</Field><Field name="csEndTime">0x00000000</Field></Command><Command name="CMD_PROP_RX_ADV"><Field name="commandNo">0x00003804</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="pktConf">0x00000000</Field><Field name="rxConf">0x00000000</Field><Field name="syncWord0">0x00000000</Field><Field name="syncWord1">0x00000000</Field><Field name="maxPktLen">0x000000ff</Field><Field name="hdrConf">0x00000000</Field><Field name="addrConf">0x00000000</Field><Field name="lenOffset">0x00000000</Field><Field name="endTrigger">0x00000000</Field><Field name="endTime">0x00000000</Field><Field name="pAddr">0x00000000</Field><Field name="pQueue">0x00000000</Field><Field name="pOutput">0x00000000</Field></Command><Command name="CMD_PROP_RX"><Field name="commandNo">0x00003802</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="pktConf">0x00000018</Field><Field name="rxConf">0x00000088</Field><Field name="syncWord">0x00000000</Field><Field name="maxPktLen">0x000000ff</Field><Field name="address0">0x000000aa</Field><Field name="address1">0x000000bb</Field><Field name="endTrigger">0x00000001</Field><Field name="endTime">0x00000000</Field><Field name="pQueue">0x00000000</Field><Field name="pOutput">0x00000000</Field></Command><Command name="CMD_PROP_RADIO_SETUP"><Field name="commandNo">0x00003806</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="modulation">0x00000000</Field><Field name="symbolRate">0x00000000</Field><Field name="rxBw">0x00000000</Field><Field name="preamConf">0x00000000</Field><Field name="formatConf">0x00000000</Field><Field name="config">0x00000000</Field><Field name="txPower">0x00000000</Field><Field name="pRegOverride">0x00000000</Field></Command><Command name="CMD_PROP_RADIO_DIV_SETUP"><Field name="commandNo">0x00003807</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="modulation">0x000000a1</Field><Field name="symbolRate">0x0066660f</Field><Field name="rxBw">0x00000023</Field><Field name="preamConf">0x00000002</Field><Field name="formatConf">0x00000820</Field><Field name="config">0x00000008</Field><Field name="txPower">0x0000784e</Field><Field name="pRegOverride">0x00000000</Field><Field name="centerFreq">0x000001f1</Field><Field name="intFreq">0x00008000</Field><Field name="loDivider">0x0000000a</Field><OverrideField name="pRegOverride"><OverrideBuffer name="override_use_patch_simplelink_long_range.xml"><Element32b>MCE_RFE_OVERRIDE(1,0,0,1,0,0)</Element32b></OverrideBuffer><OverrideBuffer name="override_synth_prop_430_510_div10_lbw60k.xml"><Element32b>HW_REG_OVERRIDE(0x4038,0x0037)</Element32b><Element32b>0x000684A3</Element32b><Element32b>HW_REG_OVERRIDE(0x4020,0x7F00)</Element32b><Element32b>HW_REG_OVERRIDE(0x4064,0x0040)</Element32b><Element32b>0xB1070503</Element32b><Element32b>0x05330523</Element32b><Element32b>0x40410583</Element32b><Element32b>0x32CC0603</Element32b><Element32b>0x00010623</Element32b><Element32b>ADI_REG_OVERRIDE(1,4,0x9F)</Element32b><Element32b>ADI_HALFREG_OVERRIDE(1,7,0x4,0x4)</Element32b><Element32b>0x02010403</Element32b><Element32b>0x00108463</Element32b><Element32b>0x04B00243</Element32b></OverrideBuffer><OverrideBuffer name="override_synth_disable_bias_div10.xml"><Element32b>HW32_ARRAY_OVERRIDE(0x405C,1)</Element32b><Element32b>0x18000280</Element32b></OverrideBuffer><OverrideBuffer name="override_phy_rx_aaf_bw_0xd.xml"><Element32b>ADI_HALFREG_OVERRIDE(0,61,0xF,0xD)</Element32b></OverrideBuffer><OverrideBuffer name="override_phy_gfsk_rx.xml"><Element32b>0x00038883</Element32b><Element32b>HW_REG_OVERRIDE(0x6084,0x35F1)</Element32b></OverrideBuffer><OverrideBuffer name="override_phy_gfsk_pa_ramp_agc_reflevel_0x16.xml"><Element32b>HW_REG_OVERRIDE(0x6088,0x4116)</Element32b><Element32b>HW_REG_OVERRIDE(0x608C,0x8213)</Element32b></OverrideBuffer><OverrideBuffer name="override_phy_long_range_dsss2.xml"><Element32b>HW_REG_OVERRIDE(0x505C,0x0100)</Element32b></OverrideBuffer><OverrideBuffer name="override_phy_rx_rssi_offset_neg2db.xml"><Element32b>0x000288A3</Element32b></OverrideBuffer></OverrideField></Command><Command name="CMD_PROP_CS"><Field name="commandNo">0x00003805</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="csFsConf">0x00000000</Field><Field name="csConf">0x00000000</Field><Field name="rssiThr">0x00000000</Field><Field name="numRssiIdle">0x00000000</Field><Field name="numRssiBusy">0x00000000</Field><Field name="corrPeriod">0x00000000</Field><Field name="corrConfig">0x00000000</Field><Field name="csEndTrigger">0x00000000</Field><Field name="csEndTime">0x00000000</Field></Command><Command name="CMD_PATTERN_CHECK"><Field name="commandNo">0x00000813</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="patternOpt">0x00000000</Field><Field name="pNextOpIfOk">0x00000000</Field><Field name="pValue">0x00000000</Field><Field name="mask">0x00000000</Field><Field name="compareVal">0x00000000</Field></Command><Command name="CMD_NOP"><Field name="commandNo">0x00000801</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field></Command><Command name="CMD_FS_POWERUP"><Field name="commandNo">0x0000080c</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="pRegOverride">0x00000000</Field></Command><Command name="CMD_FS_POWERDOWN"><Field name="commandNo">0x0000080d</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field></Command><Command name="CMD_FS_OFF"><Field name="commandNo">0x00000804</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field></Command><Command name="CMD_FS"><Field name="commandNo">0x00000803</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000001</Field><Field name="frequency">0x000001f1</Field><Field name="fractFreq">0x0000cccd</Field><Field name="synthConf">0x00000000</Field></Command><Command name="CMD_COUNT_BRANCH"><Field name="commandNo">0x00000812</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="counter">0x00000000</Field><Field name="pNextOpIfOk">0x00000000</Field></Command><Command name="CMD_COUNT"><Field name="commandNo">0x0000080b</Field><Field name="status">0x00000000</Field><Field name="pNextOp">0x00000000</Field><Field name="startTime">0x00000000</Field><Field name="startTrigger">0x00000000</Field><Field name="condition">0x00000000</Field><Field name="counter">0x00000000</Field></Command><Command name="CMD_ABORT"><Field name="commandNo">0x00000401</Field></Command></commandsettings><dcpanel><Property role="44" name="m_chkCmdView">2</Property><Property role="44" name="m_chkRfParameters">2</Property><Property role="33" name="m_typicalSettings">Settings for 431 - 527 MHz band;5 kbps, SimpleLink Long Range (20 kchip/s, 2-GFSK, conv. FEC r=1/2 K=7, DSSS SF=2, Tx dev.: 5 kHz, Rx BW: 49 kHz)</Property><Property role="37" name="m_testFuncPanel">2</Property></dcpanel><targetconfig><Property role="46" name="m_cmbBoardSelection">0</Property><Property role="44" name="m_chkDcDc">2</Property></targetconfig><rfparameters><Property role="65535" name="txPower">12</Property></rfparameters><conttx><Property role="45" name="m_rbtModulated">1</Property><Property role="45" name="m_rbtUnmodulated">0</Property><Property role="46" name="m_cmbDataFormat">-1</Property><Property role="44" name="m_chkFreqSweep">0</Property><Property role="44" name="m_chkChanSweep">0</Property></conttx><contrx><Property role="46" name="m_cmbDataFormat">0</Property><Property role="44" name="m_chkAutoScroll">2</Property></contrx><packettx><Property role="42" name="m_edtPacketCount">100</Property><Property role="42" name="m_edtFixedPktLength">30</Property><Property role="42" name="m_edtPacketData">78 64 c7 1d cc 1b ca d9 8a 4b </Property><Property role="42" name="m_edtAccessAddress"></Property><Property role="44" name="m_chkAddSeqNbr">2</Property><Property role="44" name="m_chkInfinite">0</Property><Property role="45" name="m_rbtRandom">1</Property><Property role="45" name="m_rbtText">0</Property><Property role="45" name="m_rbtHex">0</Property><Property role="44" name="m_chkAdvanced">0</Property><Property role="46" name="m_cmbLengthConfig">0</Property><Property role="42" name="m_edtFixedPktLength">30</Property><Property role="20" name="m_grp802154g">0</Property><Property role="42" name="m_edt802154gPktLength">13</Property><Property role="45" name="m_rbt802154g2BCrc">1</Property><Property role="45" name="m_rbt802154g4BCrc">0</Property><Property role="44" name="m_chk802154gWhitening">2</Property><Property role="44" name="m_chkFEC">0</Property><Property role="46" name="m_cmbPreambleCount">3</Property><Property role="44" name="m_chkAddress">2</Property><Property role="46" name="m_cmbSyncMode">24</Property></packettx><packetview><Property role="42" name="m_edtPktLength">13</Property><Property role="42" name="m_edtAddress">AA</Property><Property role="41" name="m_lblFrmPayload">78 64 c7 1d cc 1b ca d9 8a 4b </Property></packetview><packetrx><Property role="42" name="m_edtPacketCount">100</Property><Property role="42" name="m_edtAccessAddress">0x00000000</Property><Property role="44" name="m_chkInfinite">0</Property><Property role="46" name="m_cmbViewFormat">0</Property><Property role="44" name="m_chkSeqNbrIncluded">2</Property><Property role="42" name="m_edtDumpFile"></Property><Property role="44" name="m_chkAdvanced">0</Property><Property role="44" name="m_chk802154gMode">0</Property></packetrx> </dcpanelconfiguration>

6278.smartrf_settings.hsmartrf_settings_predefined.h6278.smartrf_settings_predefined.c

//********************************************************************************* // Generated by SmartRF Studio version 2.9.0 (build #168) // Tested for SimpleLink SDK version: CC13x0 SDK 2.10.xx.xx // Device: CC1310 Rev. 2.1 // //*********************************************************************************#include <ti/devices/DeviceFamily.h> #include DeviceFamily_constructPath(driverlib/rf_mailbox.h) #include DeviceFamily_constructPath(driverlib/rf_hs_mailbox.h) #include DeviceFamily_constructPath(driverlib/rf_common_cmd.h) #include DeviceFamily_constructPath(driverlib/rf_hs_cmd.h) #include DeviceFamily_constructPath(driverlib/rf_prop_cmd.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_genfsk.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_genfsk.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_lrm.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_lrm.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_genook.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_mce_genook.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_genook.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_mce_hsp_4mbps.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_hsp_4mbps.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_sl_longrange.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_mce_sl_longrange.h) #include DeviceFamily_constructPath(rf_patches/rf_patch_rfe_sl_longrange.h)#include <ti/drivers/rf/RF.h> #include "smartrf_settings_predefined.h"// TI-RTOS RF Mode Object RF_Mode RF_prop_fsk = {.rfMode = RF_MODE_PROPRIETARY_SUB_1,.cpePatchFxn = &rf_patch_cpe_genfsk,.mcePatchFxn = 0,.rfePatchFxn = &rf_patch_rfe_genfsk, };RF_Mode RF_prop_lrm = {.rfMode = RF_MODE_PROPRIETARY_SUB_1,.cpePatchFxn = &rf_patch_cpe_lrm,.mcePatchFxn = 0,.rfePatchFxn = &rf_patch_rfe_lrm, };RF_Mode RF_prop_ook = {.rfMode = RF_MODE_PROPRIETARY_SUB_1,.cpePatchFxn = &rf_patch_cpe_genook,.mcePatchFxn = &rf_patch_mce_genook,.rfePatchFxn = &rf_patch_rfe_genook, };RF_Mode RF_prop_hsm = {.rfMode = RF_MODE_PROPRIETARY_SUB_1,.cpePatchFxn =0,.mcePatchFxn =&rf_patch_mce_hsp_4mbps,.rfePatchFxn =&rf_patch_rfe_hsp_4mbps, };RF_Mode RF_prop_sl_lr = {.rfMode = RF_MODE_PROPRIETARY_SUB_1,.cpePatchFxn =&rf_patch_cpe_sl_longrange,.mcePatchFxn =&rf_patch_mce_sl_longrange,.rfePatchFxn =&rf_patch_rfe_sl_longrange, };// TX Power table // The RF_TxPowerTable_DEFAULT_PA_ENTRY macro is defined in RF.h and requires the following arguments: // RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost coefficient) // See the Technical Reference Manual for further details about the "txPower" Command field. // The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise. const RF_TxPowerTable_Entry PROP_RF_txPowerTable[] ={{-10, RF_TxPowerTable_DEFAULT_PA_ENTRY(0, 3, 0, 4) },{0, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 1, 0, 0) },{1, RF_TxPowerTable_DEFAULT_PA_ENTRY(3, 3, 0, 8) },{2, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 1, 0, 8) },{3, RF_TxPowerTable_DEFAULT_PA_ENTRY(4, 3, 0, 10) },{4, RF_TxPowerTable_DEFAULT_PA_ENTRY(5, 3, 0, 12) },{5, RF_TxPowerTable_DEFAULT_PA_ENTRY(6, 3, 0, 12) },{6, RF_TxPowerTable_DEFAULT_PA_ENTRY(7, 3, 0, 14) },{7, RF_TxPowerTable_DEFAULT_PA_ENTRY(9, 3, 0, 16) },{8, RF_TxPowerTable_DEFAULT_PA_ENTRY(11, 3, 0, 18) },{9, RF_TxPowerTable_DEFAULT_PA_ENTRY(13, 3, 0, 22) },{10, RF_TxPowerTable_DEFAULT_PA_ENTRY(19, 3, 0, 28) },{11, RF_TxPowerTable_DEFAULT_PA_ENTRY(26, 3, 0, 40) },{12, RF_TxPowerTable_DEFAULT_PA_ENTRY(24, 0, 0, 92) },{13, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 0, 83) }, // The original PA value (12.5 dBm) have been rounded to an integer value.{14, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 1, 83) }, // This setting requires CCFG_FORCE_VDDR_HH = 1.RF_TxPowerTable_TERMINATION_ENTRY };const uint8_t PROP_RF_txPowerTableSize = sizeof(PROP_RF_txPowerTable)/sizeof(RF_TxPowerTable_Entry);// TX Power table // The RF_TxPowerTable_DEFAULT_PA_ENTRY macro is defined in RF.h and requires the following arguments: // RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost coefficient) // See the Technical Reference Manual for further details about the "txPower" Command field. // The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise. const RF_TxPowerTable_Entry PROP_RF_txPowerTableREUS[] ={{7, RF_TxPowerTable_DEFAULT_PA_ENTRY(0, 3, 0, 0) },{14, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 3, 0, 0) },{18, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 3, 0, 0) },{20, RF_TxPowerTable_DEFAULT_PA_ENTRY(3, 3, 0, 0) },{22, RF_TxPowerTable_DEFAULT_PA_ENTRY(4, 3, 0, 0) },{23, RF_TxPowerTable_DEFAULT_PA_ENTRY(5, 3, 0, 0) },{24, RF_TxPowerTable_DEFAULT_PA_ENTRY(6, 3, 0, 0) },{25, RF_TxPowerTable_DEFAULT_PA_ENTRY(9, 3, 0, 0) },{26, RF_TxPowerTable_DEFAULT_PA_ENTRY(14, 3, 0, 0) },RF_TxPowerTable_TERMINATION_ENTRY };const uint8_t PROP_RF_txPowerTableREUSSize = sizeof(PROP_RF_txPowerTableREUS)/sizeof(RF_TxPowerTable_Entry);// TX Power table // The RF_TxPowerTable_DEFAULT_PA_ENTRY macro is defined in RF.h and requires the following arguments: // RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost coefficient) // See the Technical Reference Manual for further details about the "txPower" Command field. // The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise. const RF_TxPowerTable_Entry PROP_RF_txPowerTableREEU[] ={{12, RF_TxPowerTable_DEFAULT_PA_ENTRY(0, 3, 0, 0) },{18, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 3, 0, 0) },{21, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 3, 0, 0) },{23, RF_TxPowerTable_DEFAULT_PA_ENTRY(3, 3, 0, 0) },{24, RF_TxPowerTable_DEFAULT_PA_ENTRY(4, 3, 0, 0) },{25, RF_TxPowerTable_DEFAULT_PA_ENTRY(6, 3, 0, 0) },{26, RF_TxPowerTable_DEFAULT_PA_ENTRY(11, 3, 0, 0) },RF_TxPowerTable_TERMINATION_ENTRY };const uint8_t PROP_RF_txPowerTableREEUSize = sizeof(PROP_RF_txPowerTableREEU)/sizeof(RF_TxPowerTable_Entry);// Overrides for CMD_PROP_RADIO_DIV_SETUP FSK uint32_t pOverrides_fsk[] = {// override_use_patch_prop_genfsk.xml// PHY: Use MCE ROM bank 4, RFE RAM patchMCE_RFE_OVERRIDE(0,4,0,1,0,0),// override_synth_prop_863_930_div5.xml// Synth: Set recommended RTRIM to 7HW_REG_OVERRIDE(0x4038,0x0037),// Synth: Set Fref to 4 MHz(uint32_t)0x000684A3,// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4020,0x7F00),// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4064,0x0040),// Synth: Configure fine calibration setting(uint32_t)0xB1070503,// Synth: Configure fine calibration setting(uint32_t)0x05330523,// Synth: Set loop bandwidth after lock to 20 kHz(uint32_t)0x0A480583,// Synth: Set loop bandwidth after lock to 20 kHz(uint32_t)0x7AB80603,// Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)ADI_REG_OVERRIDE(1,4,0x9F),// Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),// Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering(uint32_t)0x02010403,// Synth: Configure extra PLL filtering(uint32_t)0x00108463,// Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)(uint32_t)0x04B00243,// override_phy_rx_aaf_bw_0xd.xml// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),// override_phy_gfsk_rx.xml// Rx: Set LNA bias current trim offset to 3(uint32_t)0x00038883,// Rx: Freeze RSSI on sync found eventHW_REG_OVERRIDE(0x6084,0x35F1),// override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml// Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x1A.HW_REG_OVERRIDE(0x6088,0x411A),// Tx: Configure PA ramping settingHW_REG_OVERRIDE(0x608C,0x8213),// override_phy_rx_rssi_offset_5db.xml// Rx: Set RSSI offset to adjust reported RSSI by +5 dB(uint32_t)0x00FB88A3, #if (CCFG_FORCE_VDDR_HH)// TX power override// Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)ADI_REG_OVERRIDE(0,12,0xF8), #endif(uint32_t)0xFFFFFFFF, };// Overrides for CMD_PROP_RADIO_DIV_SETUP LRM uint32_t pOverrides_lrm[] = {// override_use_patch_prop_lrm.xml// PHY: Use MCE ROM bank 3, RFE RAM patchMCE_RFE_OVERRIDE(0,3,0,1,0,0),// override_synth_prop_863_930_div5.xml// Synth: Set recommended RTRIM to 7HW_REG_OVERRIDE(0x4038,0x0037),// Synth: Set Fref to 4 MHz(uint32_t)0x000684A3,// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4020,0x7F00),// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4064,0x0040),// Synth: Configure fine calibration setting(uint32_t)0xB1070503,// Synth: Configure fine calibration setting(uint32_t)0x05330523,// Synth: Set loop bandwidth after lock to 20 kHz(uint32_t)0x0A480583,// Synth: Set loop bandwidth after lock to 20 kHz(uint32_t)0x7AB80603,// Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)ADI_REG_OVERRIDE(1,4,0x9F),// Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),// Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering(uint32_t)0x02010403,// Synth: Configure extra PLL filtering(uint32_t)0x00108463,// Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)(uint32_t)0x04B00243,// override_phy_rx_aaf_bw_0xd.xml// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),// override_phy_gfsk_rx.xml// Rx: Set LNA bias current trim offset to 3(uint32_t)0x00038883,// Rx: Freeze RSSI on sync found eventHW_REG_OVERRIDE(0x6084,0x35F1),// override_phy_gfsk_pa_ramp_agc_reflevel_0x1a.xml// Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x1A.HW_REG_OVERRIDE(0x6088,0x411A),// Tx: Configure PA ramping settingHW_REG_OVERRIDE(0x608C,0x8213),// override_phy_lrm_rom_dsss8.xml// PHY: Configure DSSS=8HW_REG_OVERRIDE(0x505C,0x073C),// override_phy_rx_rssi_offset_5db.xml// Rx: Set RSSI offset to adjust reported RSSI by +5 dB(uint32_t)0x00FB88A3, #if (CCFG_FORCE_VDDR_HH)// TX power override// Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)ADI_REG_OVERRIDE(0,12,0xF8), #endif(uint32_t)0xFFFFFFFF, };// Overrides for CMD_PROP_RADIO_DIV_SETUP OOK uint32_t pOverrides_ook[] = {// override_use_patch_prop_genook_nrz.xml// PHY: Use MCE RAM patch, RFE RAM patchMCE_RFE_OVERRIDE(1,0,0,1,0,0),// override_synth_prop_863_930_div5.xml// Synth: Set recommended RTRIM to 7HW_REG_OVERRIDE(0x4038,0x0037),// Synth: Set Fref to 4 MHz(uint32_t)0x000684A3,// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4020,0x7F00),// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4064,0x0040),// Synth: Configure fine calibration setting(uint32_t)0xB1070503,// Synth: Configure fine calibration setting(uint32_t)0x05330523,// Synth: Set loop bandwidth after lock to 20 kHz(uint32_t)0x0A480583,// Synth: Set loop bandwidth after lock to 20 kHz(uint32_t)0x7AB80603,// Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)ADI_REG_OVERRIDE(1,4,0x9F),// Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),// Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering(uint32_t)0x02010403,// Synth: Configure extra PLL filtering(uint32_t)0x00108463,// Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)(uint32_t)0x04B00243,// override_phy_rx_aaf_bw_0xd.xml// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),// override_phy_agc_reflevel_0x19.xml// Rx: Set AGC reference level to 0x19HW_REG_OVERRIDE(0x6088,0x0019),// override_phy_ook_rx.xml// Rx: Set LNA bias current trim offset to 3(uint32_t)0x00038883,// Rx: Freeze RSSI on sync found eventHW_REG_OVERRIDE(0x6084,0x35F1),// override_phy_ook_tx_symbol_4_8kbaud.xml// Tx: Set symbol duty-cycle delay before symbol ramp-down to 0x78 (=120). This means symbol ramp down will begin after reaching (T_symbol/2) plus wait a delay of (120/2)=60 us.HW_REG_OVERRIDE(0x52B8,0x8078),// override_phy_ook_rx_filter_iir_k_1div4.xml// Rx: Set data filter to IIR, k=1/4. Explanation: 0x0000: k=1 (no filter), 0x0001: k=1/2, 0x0002: k=1/4, 0x0003: k=1/8.HW_REG_OVERRIDE(0x5204,0x0002),// override_phy_ook_tx_power_max.xml// Tx: Ramp symbol shape to maximum PA level (0x7200). Explanation: min power=0x6100, ..., max power=0x7200. Bits [15:13] sets wait delay per PA ramp level. Bits[12:8] sets number of PA levels to use from ramp LUT (range 1-18). Bits[7:0] reserved.HW_REG_OVERRIDE(0x6098,0x7200),// override_phy_rx_rssi_offset_5db.xml// Rx: Set RSSI offset to adjust reported RSSI by +5 dB(uint32_t)0x00FB88A3,(uint32_t)0xFFFFFFFF, };// Overrides for CMD_RADIO_SETUP HSM uint32_t shapeovr[] = {0x00000000, 0x00000000, 0x00000000, 0x12010000, 0x72685C43, 0x8986817A};uint32_t pOverrides_hsm[] = {MCE_RFE_OVERRIDE(1,0,0,1,0,0),ADI_HALFREG_OVERRIDE(0,61,0xF,0x0),ADI_REG_OVERRIDE(1,4,0x9F),ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),HW_REG_OVERRIDE(0x4038,0x003A),HW_REG_OVERRIDE(0x4020,0x7F00),HW_REG_OVERRIDE(0x4064,0x0040),0x000604A3,0xB1070503,0x05330523,0x0A480583,0x7AB80603,0x00108463,0x02010403,0x04B00243,0x00038883,0xC0040031,(uint32_t) &shapeovr[0],0xC0040021,(uint32_t) (0x00000035),0x000388A3,HW_REG_OVERRIDE(0x50B4,0x6666),HW_REG_OVERRIDE(0x50B8,0x000C),(uint32_t)0xFFFFFFFF, };// Overrides for CMD_RADIO_DIV_SETUP SIMPLELINK LONGRANGE uint32_t pOverrides_sl_lr[] = {// override_use_patch_simplelink_long_range.xml// PHY: Use MCE RAM patch, RFE RAM patchMCE_RFE_OVERRIDE(1,0,0,1,0,0),// override_synth_prop_863_930_div5_lbw60k.xml// Synth: Set recommended RTRIM to 7HW_REG_OVERRIDE(0x4038,0x0037),// Synth: Set Fref to 4 MHz(uint32_t)0x000684A3,// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4020,0x7F00),// Synth: Configure fine calibration settingHW_REG_OVERRIDE(0x4064,0x0040),// Synth: Configure fine calibration setting(uint32_t)0xB1070503,// Synth: Configure fine calibration setting(uint32_t)0x05330523,// Synth: Set loop bandwidth after lock to 60 kHz(uint32_t)0x40410583,// Synth: Set loop bandwidth after lock to 60 kHz(uint32_t)0x32CC0603,// Synth: Set loop bandwidth after lock to 60 kHz(uint32_t)0x00010623,// Synth: Configure VCO LDO (in ADI1, set VCOLDOCFG=0x9F to use voltage input reference)ADI_REG_OVERRIDE(1,4,0x9F),// Synth: Configure synth LDO (in ADI1, set SLDOCTL0.COMP_CAP=1)ADI_HALFREG_OVERRIDE(1,7,0x4,0x4),// Synth: Use 24 MHz XOSC as synth clock, enable extra PLL filtering(uint32_t)0x02010403,// Synth: Configure extra PLL filtering(uint32_t)0x00108463,// Synth: Increase synth programming timeout (0x04B0 RAT ticks = 300 us)(uint32_t)0x04B00243,// override_synth_disable_bias_div5.xml// Synth: Set divider bias to disabledHW32_ARRAY_OVERRIDE(0x405C,1),// Synth: Set divider bias to disabled (specific for loDivider=5)(uint32_t)0x18000200,// override_phy_rx_aaf_bw_0xd.xml// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),// override_phy_gfsk_rx.xml// Rx: Set LNA bias current trim offset to 3(uint32_t)0x00038883,// Rx: Freeze RSSI on sync found eventHW_REG_OVERRIDE(0x6084,0x35F1),// override_phy_gfsk_pa_ramp_agc_reflevel_0x14.xml// Tx: Configure PA ramping setting (0x41). Rx: Set AGC reference level to 0x14.HW_REG_OVERRIDE(0x6088,0x4114),// Tx: Configure PA ramping settingHW_REG_OVERRIDE(0x608C,0x8213),// override_phy_long_range_dsss2.xml// PHY: Configure DSSS SF=2HW_REG_OVERRIDE(0x505C,0x0100),// override_phy_rx_rssi_offset_5db.xml// Rx: Set RSSI offset to adjust reported RSSI by +5 dB(uint32_t)0x00FB88A3, #if (CCFG_FORCE_VDDR_HH)// TX power override// Tx: Set PA trim to max (in ADI0, set PACTL0=0xF8)ADI_REG_OVERRIDE(0,12,0xF8), #endif(uint32_t)0xFFFFFFFF, };// CMD_PROP_RADIO_DIV_SETUP FSK rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_fsk = {.commandNo = 0x3807,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.modulation.modType = 0x1,.modulation.deviation = 0x64,.symbolRate.preScale = 0xF,.symbolRate.rateWord = 0x8000,.rxBw = 0x24,.preamConf.nPreamBytes = 0x4,.preamConf.preamMode = 0x0,.formatConf.nSwBits = 0x20,.formatConf.bBitReversal = 0x0,.formatConf.bMsbFirst = 0x1,.formatConf.fecMode = 0x0,.formatConf.whitenMode = 0x0,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.analogCfgMode = 0x0,.config.bNoFsPowerUp = 0x0,.txPower = 0xA73F,.pRegOverride = pOverrides_fsk,.centerFreq = 0x0364,.intFreq = 0x8000,.loDivider = 0x05, };// CMD_PROP_RADIO_DIV_SETUP LRM rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_lrm = {.commandNo = 0x3807,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.modulation.modType = 0x0,.modulation.deviation = 0x14,.symbolRate.preScale = 0xF,.symbolRate.rateWord = 0x199A,.rxBw = 0x20,.preamConf.nPreamBytes = 0x5,.preamConf.preamMode = 0x0,.formatConf.nSwBits = 0x20,.formatConf.bBitReversal = 0x0,.formatConf.bMsbFirst = 0x0,.formatConf.fecMode = 0x8,.formatConf.whitenMode = 0x0,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.analogCfgMode = 0x0,.config.bNoFsPowerUp = 0x0,.txPower = 0xA73F,.pRegOverride = pOverrides_lrm,.centerFreq = 0x0364,.intFreq = 0x8000,.loDivider = 0x05, };// CMD_PROP_RADIO_DIV_SETUP OOK rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_ook = {.commandNo = 0x3807,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.modulation.modType = 0x2,.modulation.deviation = 0x0,.symbolRate.preScale = 0xF,.symbolRate.rateWord = 0xC4A,.rxBw = 0x20,.preamConf.nPreamBytes = 0x4,.preamConf.preamMode = 0x0,.formatConf.nSwBits = 0x20,.formatConf.bBitReversal = 0x0,.formatConf.bMsbFirst = 0x1,.formatConf.fecMode = 0x0,.formatConf.whitenMode = 0x1,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.analogCfgMode = 0x0,.config.bNoFsPowerUp = 0x0,.txPower = 0xA73F,.pRegOverride = pOverrides_ook,.centerFreq = 0x0364,.intFreq = 0x8000,.loDivider = 0x05, };// CMD_RADIO_SETUP HSM rfc_CMD_RADIO_SETUP_t RF_cmdRadioSetup_hsm = {.commandNo = CMD_RADIO_SETUP,.status = 0x0000,.pNextOp = 0x00000000,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.mode = 0x05,.loDivider = 5,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.bNoFsPowerUp = 0,.txPower = 0x23F,.pRegOverride = pOverrides_hsm, };// CMD_PROP_RADIO_DIV_SETUP SIMPLELINK LONGRANGE rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup_sl_lr = {.commandNo = 0x3807,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.modulation.modType = 0x1,.modulation.deviation = 0x14,.symbolRate.preScale = 0xF,.symbolRate.rateWord = 0x3333,.rxBw = 0x21,.preamConf.nPreamBytes = 0x2,.preamConf.preamMode = 0x0,.formatConf.nSwBits = 0x20,.formatConf.bBitReversal = 0x0,.formatConf.bMsbFirst = 0x0,.formatConf.fecMode = 0x8,.formatConf.whitenMode = 0x0,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.analogCfgMode = 0x0,.config.bNoFsPowerUp = 0x0,.txPower = 0xA73F,.pRegOverride = pOverrides_sl_lr,.centerFreq = 0x0364,.intFreq = 0x8000,.loDivider = 0x05, };// CMD_TX_HS rfc_CMD_HS_TX_t RF_cmdTxHS = {.commandNo = 0x3841,.status = 0x0000,.pNextOp = 0x00000000,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bVarLen = 0x1,.pQueue = 0, };// CMD_RX_HS rfc_CMD_HS_RX_t RF_cmdRxHS = {.commandNo = CMD_HS_RX,.status = 0x0000,.pNextOp = 0x00000000,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0,.pktConf.bUseCrc = 1,.pktConf.bVarLen = 1,.pktConf.bRepeatOk = 0,.pktConf.bRepeatNok = 0,.pktConf.addressMode = 0,.rxConf.bAutoFlushCrcErr = 0,.rxConf.bIncludeLen = 1,.rxConf.bIncludeCrc = 0,.rxConf.bAppendStatus = 0,.rxConf.bAppendTimestamp = 0,.maxPktLen = 0,.address0 = 0,.address1 = 0,.__dummy0 = 0,.endTrigger.triggerType = 1,.endTrigger.bEnaCmd = 0,.endTrigger.triggerNo = 0,.endTrigger.pastTrig = 0,.endTime = 0,.pQueue = 0,.pOutput = 0, };// CMD_FS rfc_CMD_FS_t RF_cmdFs_preDef = {.commandNo = 0x0803,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.frequency = 0x0364,.fractFreq = 0x0000,.synthConf.bTxMode = 0x0,.synthConf.refFreq = 0x0,.__dummy0 = 0x00,.__dummy1 = 0x00,.__dummy2 = 0x00,.__dummy3 = 0x0000, };// CMD_PROP_TX rfc_CMD_PROP_TX_t RF_cmdPropTx_preDef = {.commandNo = 0x3801,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bVarLen = 0x1,.pktLen = 0x14, // SET APPLICATION PAYLOAD LENGTH.syncWord = 0x930B51DE,.pPkt = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx };// CMD_PROP_RX_ADV rfc_CMD_PROP_RX_ADV_t RF_cmdPropRxAdv_preDef = {.commandNo = 0x3804,.status = 0x0000,.pNextOp = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bRepeatOk = 0x0,.pktConf.bRepeatNok = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bCrcIncSw = 0x0,.pktConf.bCrcIncHdr = 0x1,.pktConf.endType = 0x0,.pktConf.filterOp = 0x1,.rxConf.bAutoFlushIgnored = 0x0,.rxConf.bAutoFlushCrcErr = 0x0,.rxConf.bIncludeHdr = 0x1,.rxConf.bIncludeCrc = 0x0,.rxConf.bAppendRssi = 0x0,.rxConf.bAppendTimestamp = 0x0,.rxConf.bAppendStatus = 0x0,.syncWord0 = 0x930B51DE,.syncWord1 = 0,.maxPktLen = 0,.hdrConf.numHdrBits = 8,.hdrConf.lenPos = 0,.hdrConf.numLenBits = 8,.addrConf.addrType = 0,.addrConf.addrSize = 0,.addrConf.addrPos = 0,.addrConf.numAddr = 1,.lenOffset = 0,.endTrigger.triggerType = 0x1,.endTrigger.bEnaCmd = 0x0,.endTrigger.triggerNo = 0x0,.endTrigger.pastTrig = 0x0,.endTime = 0x00000000,.pAddr = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx.pQueue = 0, // INSERT APPLICABLE POINTER: (dataQueue_t*)&xxx.pOutput = 0, // INSERT APPLICABLE POINTER: (uint8_t*)&xxx };/* RF command pointers for easylink */ RF_Mode *RF_pProp_fsk = &RF_prop_fsk; RF_Mode *RF_pProp_lrm = &RF_prop_lrm; RF_Mode *RF_pProp_ook = &RF_prop_ook; RF_Mode *RF_pProp_hsm = &RF_prop_hsm; RF_Mode *RF_pProp_sl_lr = &RF_prop_sl_lr; /* Stub out nsupported modes */ RF_Mode *RF_pProp_2_4G_fsk = 0;rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_fsk = &RF_cmdPropRadioDivSetup_fsk; rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_lrm = &RF_cmdPropRadioDivSetup_lrm; rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_ook = &RF_cmdPropRadioDivSetup_ook; rfc_CMD_RADIO_SETUP_t *RF_pCmdRadioSetup_hsm = &RF_cmdRadioSetup_hsm; rfc_CMD_PROP_RADIO_DIV_SETUP_t *RF_pCmdPropRadioDivSetup_sl_lr = &RF_cmdPropRadioDivSetup_sl_lr; /* Stub out nsupported modes */ rfc_CMD_PROP_RADIO_SETUP_t *RF_pCmdPropRadioSetup_2_4G_fsk = 0;rfc_CMD_HS_TX_t *RF_pCmdTxHS = &RF_cmdTxHS; rfc_CMD_HS_RX_t *RF_pCmdRxHS = &RF_cmdRxHS; rfc_CMD_FS_t *RF_pCmdFs_preDef = &RF_cmdFs_preDef; rfc_CMD_PROP_TX_t *RF_pCmdPropTx_preDef = &RF_cmdPropTx_preDef; rfc_CMD_PROP_RX_ADV_t *RF_pCmdPropRxAdv_preDef = &RF_cmdPropRxAdv_preDef;

,

zjj12138：

如果将CC13120接收改为rfPacketRx,那么rfEasyLinkTx发送的数据能接收到么？我这边验证的是，也不能完全接收

,

zjj12138：

有没有能同时接收rfEasyLinkTx，rfPacketTx的办法？

,

Shuyang Zhong：

在CC1312端需要手动修改射频配置，因为默认的模式中没有40kbps symbol rate + long range mode的配置。

配置方法如下：

1. 先按照您之前截图中SysConfig的配置选择对应的指标，然后先编译一次；

2. 将编译后生成的ti_radio_config.c和ti_radio_config.h两个文件从工程文件夹下的Debug\syscfg目录移到其它目录（例如smartrf_settings文件夹）；

3. 按照下面链接中的方法，在SysConfig generated files列表中取消勾选ti_radio_config.c和ti_radio_config.h，这样编译出的工程中将不会再使用SysConfig生成的这两个文件：

https://dev.ti.com/tirex/explore/content/simplelink_cc13xx_cc26xx_sdk_7_10_01_24/docs/proprietary-rf/proprietary-rf-users-guide/sysconfig/sysconfig-disable.html

4. 将${PROJECT_ROOT}/smartrf_settings添加到工程的include path中，这样就可以使用我们自己的ti_radio_config.c和.h了。

5. 在smartrf_settings/ti_radio_config.c文件中，添加或修改以下高亮部分：

重新编译后，就可以用CC1312的rfEasyLinkTx与CC1310 rfEasyLinkRx通信了。

附上CC1312的syscfg文件和ti_radio_config.c文件：

rfEasyLinkTx.syscfg

ti_radio_config.c.txt

/**======== ti_radio_config.c ========*Configured RadioConfig module definitions**DO NOT EDIT - This file is generated for the CC1312R1F3RGZ*by the SysConfig tool.**Radio Config module version : 1.14*SmartRF Studio data version : 2.26.0*/#include "ti_radio_config.h" #include DeviceFamily_constructPath(rf_patches/rf_patch_cpe_prop.h)// ********************************************************************************* //RF Frontend configuration // ********************************************************************************* // RF design based on: LAUNCHXL-CC1312R1 (CC1352EM-XD7793-XD24)// TX Power tables // The RF_TxPowerTable_DEFAULT_PA_ENTRY and RF_TxPowerTable_HIGH_PA_ENTRY macros are defined in RF.h. // The following arguments are required: // RF_TxPowerTable_DEFAULT_PA_ENTRY(bias, gain, boost, coefficient) // RF_TxPowerTable_HIGH_PA_ENTRY(bias, ibboost, boost, coefficient, ldoTrim) // See the Technical Reference Manual for further details about the "txPower" Command field. // The PA settings require the CCFG_FORCE_VDDR_HH = 0 unless stated otherwise.// 433 MHz, 13 dBm RF_TxPowerTable_Entry txPowerTable_433_pa13[TXPOWERTABLE_433_PA13_SIZE] = {{-20, RF_TxPowerTable_DEFAULT_PA_ENTRY(0, 3, 0, 0) }, // 0x00C0{-15, RF_TxPowerTable_DEFAULT_PA_ENTRY(1, 3, 0, 0) }, // 0x00C1{-10, RF_TxPowerTable_DEFAULT_PA_ENTRY(2, 3, 0, 0) }, // 0x00C2{-5, RF_TxPowerTable_DEFAULT_PA_ENTRY(4, 3, 0, 0) }, // 0x00C4{0, RF_TxPowerTable_DEFAULT_PA_ENTRY(8, 3, 0, 0) }, // 0x00C8{1, RF_TxPowerTable_DEFAULT_PA_ENTRY(9, 3, 0, 0) }, // 0x00C9{2, RF_TxPowerTable_DEFAULT_PA_ENTRY(10, 3, 0, 0) }, // 0x00CA{3, RF_TxPowerTable_DEFAULT_PA_ENTRY(11, 3, 0, 0) }, // 0x00CB{4, RF_TxPowerTable_DEFAULT_PA_ENTRY(13, 3, 0, 0) }, // 0x00CD{5, RF_TxPowerTable_DEFAULT_PA_ENTRY(15, 3, 0, 0) }, // 0x00CF{6, RF_TxPowerTable_DEFAULT_PA_ENTRY(18, 3, 0, 0) }, // 0x00D2{7, RF_TxPowerTable_DEFAULT_PA_ENTRY(21, 3, 0, 0) }, // 0x00D5{8, RF_TxPowerTable_DEFAULT_PA_ENTRY(25, 3, 0, 0) }, // 0x00D9{9, RF_TxPowerTable_DEFAULT_PA_ENTRY(31, 3, 0, 0) }, // 0x00DF{10, RF_TxPowerTable_DEFAULT_PA_ENTRY(39, 3, 0, 0) }, // 0x00E7{11, RF_TxPowerTable_DEFAULT_PA_ENTRY(8, 1, 0, 0) }, // 0x0048{12, RF_TxPowerTable_DEFAULT_PA_ENTRY(14, 1, 0, 0) }, // 0x004E{13, RF_TxPowerTable_DEFAULT_PA_ENTRY(42, 1, 0, 0) }, // 0x006A// This setting requires CCFG_FORCE_VDDR_HH = 1.// The original PA value (14.5 dBm) has been rounded to an integer value.{15, RF_TxPowerTable_DEFAULT_PA_ENTRY(63, 0, 0, 0) }, // 0x003FRF_TxPowerTable_TERMINATION_ENTRY };//********************************************************************************* //RF Setting:Custom (50 kbps, 25kHz Deviation, 2-GFSK, 78 kHz RX Bandwidth) // //PHY:custom433 //Setting file: setting_tc112_custom.json //*********************************************************************************// PARAMETER SUMMARY // RX Address Mode: No address check // Frequency (MHz): 497.8000 // Deviation (kHz): 5.0 // Packet Length Config: Variable // Max Packet Length: 255 // Preamble Count: 2 Bytes // Preamble Mode: Send 0 as the first preamble bit // RX Filter BW (kHz): 77.7 // Symbol Rate (kBaud): 39.999 // Sync Word: 0x0 // Sync Word Length: 32 Bits // TX Power (dBm): 12 // Whitening: No whitening// TI-RTOS RF Mode Object RF_Mode RF_prop = {.rfMode = RF_MODE_AUTO,.cpePatchFxn = &rf_patch_cpe_prop,.mcePatchFxn = 0,.rfePatchFxn = 0 };// Overrides for CMD_PROP_RADIO_DIV_SETUP uint32_t pOverrides[] = {// override_prop_common.json// DC/DC regulator: In Tx, use DCDCCTL5[3:0]=0x7 (DITHER_EN=0 and IPEAK=7).(uint32_t)0x00F788D3,// override_prop_common_sub1g.json// Set RF_FSCA.ANADIV.DIV_SEL_BIAS = 1. Bits [0:16, 24, 30] are don't care..(uint32_t)0x4001405D,// Set RF_FSCA.ANADIV.DIV_SEL_BIAS = 1. Bits [0:16, 24, 30] are don't care..(uint32_t)0x08141131,// override_phy_simplelink_long_range_dsss2.xml// PHY: Configure DSSS SF=2 for payload dataHW_REG_OVERRIDE(0x5068,0x0100),// override_tc112.json// Tx: Configure PA ramp time, PACTL2.RC=0x3 (in ADI0, set PACTL2[4:3]=0x3)ADI_2HALFREG_OVERRIDE(0,16,0x8,0x8,17,0x1,0x1),// Rx: Set AGC reference level to 0x19 (default: 0x2E)HW_REG_OVERRIDE(0x609C,0x0019),// Rx: Set RSSI offset to adjust reported RSSI by -7 dB (default: -2), trimmed for external bias and differential configuration(uint32_t)0x000788A3,// Rx: Set anti-aliasing filter bandwidth to 0xD (in ADI0, set IFAMPCTL3[7:4]=0xD)ADI_HALFREG_OVERRIDE(0,61,0xF,0xD),// TX: Reduce analog ramping wait timeHW_REG_OVERRIDE(0x6028,0x001A),(uint32_t)0xFFFFFFFF };// CMD_PROP_RADIO_DIV_SETUP // Proprietary Mode Radio Setup Command for All Frequency Bands rfc_CMD_PROP_RADIO_DIV_SETUP_t RF_cmdPropRadioDivSetup = {.commandNo = 0x3807,.status = 0x0000,.pNextOp = 0,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.modulation.modType = 0x1,.modulation.deviation = 0x14,.modulation.deviationStepSz = 0x0,.symbolRate.preScale = 0xF,.symbolRate.rateWord = 0x6666,.symbolRate.decimMode = 0x0,.rxBw = 0x51,.preamConf.nPreamBytes = 0x2,.preamConf.preamMode = 0x0,.formatConf.nSwBits = 0x20,.formatConf.bBitReversal = 0x0,.formatConf.bMsbFirst = 0x0,.formatConf.fecMode = 0x8,.formatConf.whitenMode = 0x0,.config.frontEndMode = 0x0,.config.biasMode = 0x1,.config.analogCfgMode = 0x0,.config.bNoFsPowerUp = 0x0,.config.bSynthNarrowBand = 0x0,.txPower = 0x004E,.pRegOverride = pOverrides,.centerFreq = 0x01F1,.intFreq = 0x8000,.loDivider = 0x0A };// CMD_FS // Frequency Synthesizer Programming Command rfc_CMD_FS_t RF_cmdFs = {.commandNo = 0x0803,.status = 0x0000,.pNextOp = 0,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.frequency = 0x01F1,.fractFreq = 0xCCCD,.synthConf.bTxMode = 0x0,.synthConf.refFreq = 0x0,.__dummy0 = 0x00,.__dummy1 = 0x00,.__dummy2 = 0x00,.__dummy3 = 0x0000 };// CMD_PROP_TX // Proprietary Mode Transmit Command rfc_CMD_PROP_TX_t RF_cmdPropTx = {.commandNo = 0x3801,.status = 0x0000,.pNextOp = 0,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bVarLen = 0x1,.pktLen = 0x14,.syncWord = 0x00000000,.pPkt = 0 };// CMD_PROP_RX // Proprietary Mode Receive Command rfc_CMD_PROP_RX_t RF_cmdPropRx = {.commandNo = 0x3802,.status = 0x0000,.pNextOp = 0,.startTime = 0x00000000,.startTrigger.triggerType = 0x0,.startTrigger.bEnaCmd = 0x0,.startTrigger.triggerNo = 0x0,.startTrigger.pastTrig = 0x0,.condition.rule = 0x1,.condition.nSkip = 0x0,.pktConf.bFsOff = 0x0,.pktConf.bRepeatOk = 0x0,.pktConf.bRepeatNok = 0x0,.pktConf.bUseCrc = 0x1,.pktConf.bVarLen = 0x1,.pktConf.bChkAddress = 0x0,.pktConf.endType = 0x0,.pktConf.filterOp = 0x0,.rxConf.bAutoFlushIgnored = 0x0,.rxConf.bAutoFlushCrcErr = 0x0,.rxConf.bIncludeHdr = 0x1,.rxConf.bIncludeCrc = 0x0,.rxConf.bAppendRssi = 0x0,.rxConf.bAppendTimestamp = 0x0,.rxConf.bAppendStatus = 0x1,.syncWord = 0x00000000,.maxPktLen = 0xFF,.address0 = 0xAA,.address1 = 0xBB,.endTrigger.triggerType = 0x1,.endTrigger.bEnaCmd = 0x0,.endTrigger.triggerNo = 0x0,.endTrigger.pastTrig = 0x0,.endTime = 0x00000000,.pQueue = 0,.pOutput = 0 };

Best regards,

Shuyang

,

zjj12138：

首先非常感谢您的配合和支持，我逐步按照您的过程配置了一下，但是结果还是接收到的数据非常少。你们easylink有很多个版本么？根据您说的，我这边认为既然又能收到的数据，那么射频参数方面应该都是配置对了，只是easylink有自己的格式，是不是easylink有很多个版本，或者更新过之前的不兼容呢？我这边尝试过很多方法，按照默认频率是可以的，但是一旦修改了，就还是收到的很少。

,

Shuyang Zhong：

您用下面压缩包里的工程试一下：

rfEasyLink.7z

这是我用来验证的工程，可以直接在CC1312和CC1310 LaunchPad上运行。

另外您说的默认频率是指多少？修改成多少之后不能通信呢？

Best regards,

Shuyang

,

zjj12138：

CC1310程序编译不过去，无法使用，CC1312正常编译下载没有问题CC1310mainBoardCode .rar这是我CC1310原来的接收工程，但是我这边使用的是IAR由于您那边无法支持到IAR软件，不知是否有助于解决问题。

,

Shuyang Zhong：

这个报错是因为依赖的tirtos工程没有导入，您先导入一下您电脑上sdk里的easylink例程，ccs应该会自动把tirtos工程也导入进去，然后您先编译tirtos工程，再编译rfEasyLinkRx工程就可以了。

Best regards,

Shuyang

,

zjj12138：

昨天我尝试导入了一个SDK里面的例程，确实是生成了一个tirtos…但是便已过去下载到开发板之后结果解释您提供的两个工程也是不通讯的。我本以为这么做有问题也没在贴中回复这个操作。既然就是这么导入再编译那我的操作没问题，但是依然还是接收不到CC1312发出来的数据。我甚至有点怀疑这个工程引用的不是工程里面的文件是引用的SDK里面的或者生成的tirtos里面的例程默认的配置

,

zjj12138：

Shuyang Zhong 说：另外您说的默认频率是指多少？修改成多少之后不能通信呢？

例程中的默认频率试868，我们这边之前用的497.8。所以我们要改成497.8还有一些其他参数，都在前面回复的贴中的截图中标注了

,

Shuyang Zhong：

我给您的工程里已经改成497.8MHz了，其它参数也是按照您的截图配置的。

您直接烧录下面压缩包里的.out文件到开发板，看下能否正常通信（LED灯同步闪烁代表通信正常，如之前视频所示）？

rfEasyLink_out_files.7z

Best regards,

Shuyang

,

zjj12138：

对的，我看到了，直接编译直接过了下载就可以，但是还是通讯不上。接收灯直接不闪，和没接收一样，我稍作改动5秒发一次，仿真也是没有接收成功进来的。我验证过默认配置，一收一发指示灯很明显同步（我知道正常通讯什么效果），而且就是仿真也是发一条直接进到成功里面，我是仿真过的。

,

Shuyang Zhong：

您先试一下我刚刚发的.out文件，如果还不行的话那就从硬件方向找原因，如果可以就是软件问题。

Best regards,

Shuyang

,

zjj12138：

out文件是可以的，发送红灯CC1312和接收绿灯CC1310是同步闪烁的。您发的两个out文件可以正常通讯，但是我的其他CC1310的同样配置的设备，您这个out文件程序也是没接收到的。normal video.rar您说如说是可以的话，就是软件问题，是我接收的软件问题么？我也尝试了按照您的步骤修改的CC1312的程序，您CC1310out文件在开发板上也是可以正常接收的，但是我运行编译的您的CC1310工程不行。您CC1312out文件发送我直行修改的也是接收不到的，是编译引用文件的问题么？这个CCS版本和使用的SDK版本有关系么？

,

Shuyang Zhong：

如果是这样的话，那么应该是Rx端软件的原因。

您有没有直接改动过SDK里面的一些文件？工程中的文件是从SDK导入进去的，如果SDK里的文件被修改了，那导入后的文件也是被修改的。您可以把现有SDK备份一下，再重新安装一下SDK，然后用beyond compare工具对比一下新旧SDK有没有区别。如果SDK中的文件被改动过，这个方法应该可以发现。

CCS版本关系应该不大，因为CCS只是IDE，实际编译时使用的是编译器，以及SDK中的文件。我附上我使用的编译器版本和SDK版本供您参考：

编译器：TI v20.2.7.LTS

SDK: simplelink_cc13x0_sdk_4_20_02_07

CCS: 12.3.0.00005

Best regards,

Shuyang