AM6442: What registers need to be modified when configuring usb to host mode?

Ti Team, Hello:

We now need to use am6442's usb as a host, now we have some problems, hope you answer.

Our current approach is described as follows:

1. Use the usb _ init interface in the MCU-SDK (in the usb_init.c, This interface is the interface used when the MCU-SDK configures the usb to the device mode) to initialize the register in the USB3P0SS _ MMR _ MMRVBP _ USBSS _ CMN Registers domain, Just change the isHostMode in the configuration parameter usbInitParamPtr to 1, That is, change USB3P0SS_W1 Register: MODESTRAP from 0 to 1, That is, to change the device mode to the host mode.
2. Initialize the xhci controllers by using our own xhci driver (previously used on multiple ARMV 8 platforms).

The current situation is that:

1. The xhci driver is initialized successfully, and sending the No Op Command command to xhc can send successfully and receive the interrupt response of xhc to read the data to event trb.
2. Problem 1: xhc reports serious error: after the driver sends the Enable Slot Command command to xhc, xhc replies a event trb (operation successful, get slot id 1) when xhc enters the error state (register USBCMD: 0xC USBSTS: 0 xD, Run / Stop (R / S) 0, xhc is stop state, Host System Error (HSE) 1, xhc serious error).
3. Problem 2: phy is not powered up: after initializing the current initialization process, transfer a hub from the microusb interface of am6442-evm board, and connect a mouse to the hub, and find that the mouse is not powered up (the mouse light is not on).

Questions expected to answer:

1. Do other registers need to be configured for the phy configuration?: As stated in question 2, we found that phy is not working properly. However, we first run the linux mirror compiled of linux-SDK, configure the usb driver, press the reset key on the card to restart, and then execute our program. At this time, phy works normally (the mouse light is on, and the usb scratch package tool can catch the physical layer communication package). So our program also lacks a configuration for phy, and this configuration is done in linux. Hope to answer this question and provide information about the phy configuration.
2. Does the OTG partial register need to be configured?: By comparing linux source code, we found that the driver of linux implements the function of xhci + OTG, but we do not configure the org register now. If you only need to use xhci function, does the OTG part need to be configured? Although xhc has been started normally, does the configuration of the OTG part still affect the internal work of xhc, leading to the phenomenon of problem 1? Hope to answer this question and provide information on the OTG section.
3. What might cause the question 1 error?: A possible cause explanation was not found in the xhci specification for this error. Is it related to the configuration of the peripheral interface? Such as memory (the current memory used for xhc is 4k aligned normal uncache), phy connection, clock, etc.

Gary Lu：

Problem 1: xhc reports serious error after sending the Enable Slot Command. This error could be related to various factors, including incorrect configuration of the peripheral interface, memory alignment issues, or clock synchronization problems. It is crucial to ensure that the peripheral interface, memory, and clock configurations are properly set up according to the specifications of the USB host controller.

Problem 2: phy is not powered up. If the phy is not powered up, it could be due to missing or incorrect configuration settings. It is important to configure the relevant registers for phy configuration properly. Additionally, the phy configuration may vary depending on the specific hardware and software setup.

Regarding your questions:

1. Other registers for phy configuration: Yes, there might be additional registers that need to be configured for proper phy functionality.2. OTG partial register configuration: If you are only using the xhci function and not utilizing the OTG functionality, it may not be necessary to configure the OTG registers.3. Possible causes for error in Problem 1: Without specific details about the error and the system setup, it is challenging to pinpoint the exact cause. However, it is recommended to thoroughly review the xhci specification, double-check the peripheral interface configuration, verify memory alignment, ensure proper phy connection, and check clock synchronization to troubleshoot the error.