TI中文支持网Part Number:TMS320F28335
我的项目需要使用BootLoader，按照之前项目使用的BootLoader参考修改了应用层的CMD文件
在Memory PAGE0中添加了如下语句
CINT00 : origin = 0x300000, length = 0x000050 /* on-chip FLASH (必需加)*/
在SECTIONS中添加了如下语句
boot28 :> CINT00, PAGE = 0
{
-l rts2800_ml.lib<boot28.obj>(.text)
}
我的程序中使用了IQ定点计算，因此添加的语句中使用的rts2800_ml.lib库，我在工程设置中已经包含了该库，但是编译后报警告
Description Resource Path Location Type
#10068-D no matching section F28335_FLASH_lnk.cmd /AudioAmplifier_CH1_CH3/cmd line 133 C/C++ Problem
貌似这个库没有起效？导致我生成的Hex文件前面部分内容如下图，通过CAN总线烧写入FLASH后应用层程序未执行
map文件中boot28.obj貌似并没有在rts2800_ml.lib中
我试了之前BootLoader没有问题项目中的hex文件，在我的控制板上依然能正常运行点亮led灯，那个项目中由于没有使用IQ定点计算，CMD中使用的-l rts2800_fpu32.lib<boot.obj>(.text)语句，并且在生成的hex文件中前部分与我不同如下，多了红框中部分，我将CMD 中-l rts2800_fpu32.lib<boot.obj>(.text)语句屏蔽后重新生成HEX就变成和我新项目中HEX一样了，并且CAN总线烧入后同样不执行。
请问我最新项目中的CMD修改是否有问题？如果没问题为什么会报no matching section的错误，导致生成的HEX以及map显示都不正常？我该如何解决，万分感谢！
user6297139：
/*
// TI File $Revision: /main/10 $
// Checkin $Date: July 9, 200813:43:56 $
//###########################################################################
//
// FILE: F28335.cmd
//
// TITLE: Linker Command File For F28335 Device
//
//###########################################################################
// $TI Release: DSP2833x/DSP2823x C/C++ Header Files V1.31 $
// $Release Date: August 4, 2009 $
//###########################################################################
*//* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file,// add the header linker command file directly to the project.// The header linker command file is required to link the
// peripheral structures to the proper locations within// the memory map.
//
// The header linker files are found in <base>\DSP2833x_Headers\cmd
//// For BIOS applications add:DSP2833x_Headers_BIOS.cmd
// For nonBIOS applications add:DSP2833x_Headers_nonBIOS.cmd========================================================= *//* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper// locations within the memory map*//* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP2833x_Headers_nonBIOS.cmd *//* Uncomment this line to include file only for BIOS applications */
/* -l DSP2833x_Headers_BIOS.cmd *//* 2) In your project add the path to <base>\DSP2833x_headers\cmd to thelibrary search path under project->build options, linker tab,library search path (-i).
/*========================================================= *//* Define the memory block start/length for the F28335PAGE 0 will be used to organize program sectionsPAGE 1 will be used to organize data sectionsNotes:Memory blocks on F28335 are uniform (ie samephysical memory) in both PAGE 0 and PAGE 1.That is the same memory region should not bedefined for both PAGE 0 and PAGE 1.Doing so will result in corruption of programand/or data.L0/L1/L2 and L3 memory blocks are mirrored - that isthey can be accessed in high memory or low memory.For simplicity only one instance is used in thislinker file.Contiguous SARAM memory blocks can be combinedif required to create a larger memory block.*/
-stack 500MEMORY
{
PAGE 0:/* Program Memory *//* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ZONE0: origin = 0x004000, length = 0x001000/* XINTF zone 0 */RAML0: origin = 0x008000, length = 0x001000/* on-chip RAM block L0 */RAML1: origin = 0x009000, length = 0x001000/* on-chip RAM block L1 */RAML2: origin = 0x00A000, length = 0x001000/* on-chip RAM block L2 */RAML3: origin = 0x00B000, length = 0x001000/* on-chip RAM block L3 */ZONE6: origin = 0x0100000, length = 0x100000/* XINTF zone 6 */ZONE7A: origin = 0x0200000, length = 0x00FC00/* XINTF zone 7 - program space */CINT00: origin = 0x300000, length = 0x000050/* on-chip FLASH (必需加)*/FLASHH: origin = 0x300050, length = 0x037FB0/* on-chip FLASH (根据需要调)*/
//FLASHG: origin = 0x308000, length = 0x008000/* on-chip FLASH */
//FLASHF: origin = 0x310000, length = 0x008000/* on-chip FLASH */
//FLASHE: origin = 0x318000, length = 0x008000/* on-chip FLASH */
//FLASHD: origin = 0x320000, length = 0x008000/* on-chip FLASH */
//FLASHC: origin = 0x328000, length = 0x008000/* on-chip FLASH */FLASHA: origin = 0x338000, length = 0x007F80/* on-chip FLASH */CSM_RSVD: origin = 0x33FF80, length = 0x000076/* Part of FLASHA.Program with all 0x0000 when CSM is in use. */BEGIN: origin = 0x33FFF6, length = 0x000002/* Part of FLASHA.Used for "boot to Flash" bootloader mode. */CSM_PWL: origin = 0x33FFF8, length = 0x000008/* Part of FLASHA.CSM password locations in FLASHA */OTP: origin = 0x380400, length = 0x000400/* on-chip OTP */ADC_CAL: origin = 0x380080, length = 0x000009/* ADC_cal function in Reserved memory */IQTABLES: origin = 0x3FE000, length = 0x000b50/* IQ Math Tables in Boot ROM */IQTABLES2: origin = 0x3FEB50, length = 0x00008c/* IQ Math Tables in Boot ROM */FPUTABLES: origin = 0x3FEBDC, length = 0x0006A0/* FPU Tables in Boot ROM */ROM: origin = 0x3FF27C, length = 0x000D44/* Boot ROM */RESET: origin = 0x3FFFC0, length = 0x000002/* part of boot ROM*/VECTORS: origin = 0x3FFFC2, length = 0x00003E/* part of boot ROM*/PAGE 1 :/* Data Memory *//* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation *//* Registers remain on PAGE1*/BOOT_RSVD: origin = 0x000000, length = 0x000050/* Part of M0, BOOT rom will use this for stack */RAMM0: origin = 0x000050, length = 0x0003B0/* on-chip RAM block M0 */RAMM1: origin = 0x000400, length = 0x000400/* on-chip RAM block M1 */RAML4: origin = 0x00C000, length = 0x001000/* on-chip RAM block L1 */RAML5: origin = 0x00D000, length = 0x001000/* on-chip RAM block L1 */RAML6: origin = 0x00E000, length = 0x001000/* on-chip RAM block L1 */RAML7: origin = 0x00F000, length = 0x001000/* on-chip RAM block L1 */ZONE7B: origin = 0x20FC00, length = 0x000400/* XINTF zone 7 - data space *///FLASHB: origin = 0x330000, length = 0x008000/* on-chip FLASH */
}/* Allocate sections to memory blocks.Note:codestart user defined section in DSP28_CodeStartBranch.asm used to redirect codeexecution when booting to flashramfuncsuser defined section to store functions that will be copied from Flash into RAM
*/SECTIONS
{boot28:> CINT00,PAGE = 0{-l rts2800_ml.lib<boot28.obj>(.text)}/* Allocate program areas: */.cinit: > FLASHHPAGE = 0.pinit: > FLASHH,PAGE = 0.text: > FLASHHPAGE = 0codestart: > BEGINPAGE = 0ramfuncs: LOAD = FLASHH,RUN = RAML0,LOAD_START(_RamfuncsLoadStart),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),PAGE = 0csmpasswds: > CSM_PWLPAGE = 0csm_rsvd: > CSM_RSVDPAGE = 0/* Allocate uninitalized data sections: */.stack: > RAMM1PAGE = 1.ebss: > RAML4PAGE = 1.esysmem: > RAMM1PAGE = 1/* Initalized sections go in Flash *//* For SDFlash to program these, they must be allocated to page 0 */.econst: > FLASHHPAGE = 0.switch: > FLASHHPAGE = 0/* Allocate IQ math areas: */IQmath: > FLASHHPAGE = 0/* Math Code */IQmathTables: > IQTABLES,PAGE = 0, TYPE = NOLOAD/* Uncomment the section below if calling the IQNexp() or IQexp()functions from the IQMath.lib library in order to utilize therelevant IQ Math table in Boot ROM (This saves space and Boot ROMis 1 wait-state). If this section is not uncommented, IQmathTables2will be loaded into other memory (SARAM, Flash, etc.) and will takeup space, but 0 wait-state is possible.*//*IQmathTables2: > IQTABLES2, PAGE = 0, TYPE = NOLOAD{IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)}*/FPUmathTables: > FPUTABLES, PAGE = 0, TYPE = NOLOAD/* Allocate DMA-accessible RAM sections: */DMARAML4: > RAML4,PAGE = 1DMARAML5: > RAML5,PAGE = 1DMARAML6: > RAML6,PAGE = 1DMARAML7: > RAML7,PAGE = 1/* Allocate 0x400 of XINTF Zone 7 to storing data */ZONE7DATA: > ZONE7B,PAGE = 1/* .reset is a standard section used by the compiler.It contains the *//* the address of the start of _c_int00 for C Code./*/* When using the boot ROM this section and the CPU vector *//* table is not needed.Thus the default type is set here to*//* DSECT*/.reset: > RESET,PAGE = 0, TYPE = DSECTvectors: > VECTORSPAGE = 0, TYPE = DSECT/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */.adc_cal: load = ADC_CAL,PAGE = 0, TYPE = NOLOAD}/*
//===========================================================================
// End of file.
//===========================================================================
*/
,
Yale Li：
请看一下这个帖子：CCS/TMS320F2812: #10068-D no matching section warning
,
user6297139：
您好，这个帖子我不太看得懂他的解决办法，–gen_func_subsections这个选项我也不知道在哪里，能麻烦您教一下吗？
,
Yale Li：
,
user6297139：
您好，这里我添加试过了，编译还是有警告，我觉得我BootLoader应用程序没执行的原因应该是程序入口地址固定的不对，我的CINT00段地址是 CINT00 : origin = 0x300000, length = 0x000050，但是编译生成的map文件中ENTRY POINT SYMBOL: "_c_int00" address: 00303884，地址在FLSHH段，请问这是为什么？是因为我的#10068-D no matching section这个警告导致的吗？
,
user6297139：
问题解决了，就是cmd中对rts库调用的问题，原语句是这样：-l rts2800_ml.lib<boot.obj>(.text) 由于TI更新过这个库中boot的调用名称，改成这个语句就好了： -l rts2800_ml.lib<boot28.asm.obj>(.text),程序入口地址已经能固定在0x300000了
,
Yale Li：
好的。非常感谢分享~
