TI中文支持网Part Number:AWR2243
请问双2243级联时，软件层Master与Slave的Cascadedevicemap不同，但是硬件层两块芯片相连，硬件层怎么区分主芯片和从芯片
Nancy Wang：
我确认一下再给你回复。
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Nancy Wang：
In a cascaded system, there is one Master chip and one or many Slave chips. These cascaded devices are synchronized using the following interfaces:
• 20 GHz (FMCW) RF LO synchronization
• Digital frame timing synchronization
• 40 MHz (System) reference clock synchronization
详见：
www.ti.com/…/swra574b.pdf
,
Nancy Wang：
In a cascaded system, there is one Master chip and one or many Slave chips. These cascaded devices are synchronized using the following interfaces:
• 20 GHz (FMCW) RF LO synchronization
• Digital frame timing synchronization
• 40 MHz (System) reference clock synchronization
详见：
www.ti.com/…/swra574b.pdf
