Part Number:TPA3118D2
Hi TI engineer:
Our products have a small number of boot crashes in the process of customer use . But it didn't happen during production and testing, and more than 2,000 units of the product have been produced .
Here are some of our relevant parameters :
- power supplier:+24V Adapter
- load:8 ohm
- VC is from 24V,Series a diode and ground 100uF capacitor
question:
- the SDZ :What is the minimum time delay required for SDZ to be enabled during the power-on process?
- RINP/RINN: At the moment of power-on, there will be a pulse signal of about +12V in the signal input. Will this pulse signal cause input overload? So the chip crashes and burns?
- if the SDZ always high, when power on ,Will the chip crash?
Kailyn Chen:
您好,这里是中文论坛,我们可以直接中文沟通。
?? ? said:the SDZ :What is the minimum time delay required for SDZ to be enabled during the power-on process?
datasheet中没有给出具体的上电时序要求,通常来说,SDZ保持为低,直到电压起来稳定之后再将SDZ拉高。从上电开始到上电完成,SDZ拉低应该要ms级的时间。
?? ? said:RINP/RINN: At the moment of power-on, there will be a pulse signal of about +12V in the signal input. Will this pulse signal cause input overload? So the chip crashes and burns?
上电开始,最好保证输出高阻态,不建议给输入信号。 就像上述所说,直到电压起来完全稳定之后再将SDZ拉高,然后再给输入信号。
上电还没完全完成的话,供电还处于欠压状态。
?? ? said:if the SDZ always high, when power on ,Will the chip crash?
SDZ一直为high,也就是TPA3118D2 一直处于使能输出,要保证上电期间输出一直高阻态,如果SDZ一直为high,很有可能是上电导致芯片损坏的原因。
我的建议是按照我上面说的上电时序,再验证下,通过您目前的描述,我认为芯片上电损坏不排除这个原因。