TLV320AIC3254: DAC配置成Line out差分输出失败-TI中文支持网

Part Number:TLV320AIC3254

硬件设计DAC是Line out差分输出，代码及路由图如下，但测试到RightDAC N,P对应的rdac_lol，rdac_lor = 1输出的信号是相同，并不是差分反相。这个问题出在哪里？

/**************** INOUT CONFIG ***********/
//reg page1, 0x34
audio_ctrl.micpga_left.in1l_micpga = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_left.in2l_micpga = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_left.in3l_micpga = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_left.in1r_micpga = AIC32x4_NOT_ROUTED;
ioctl(s_fdTlv,MICPGA_LEFT_POSITIVE_INPUT , &audio_ctrl);
//reg page1, 0x36
audio_ctrl.micpga_left.in2r_micpga = AIC32x4_NOT_ROUTED;
audio_ctrl.micpga_left.in3r_micpga = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_left.cm_micpga_via_cm1l = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_left.cm_micpga_via_cm2l = AIC32x4_ROUTED_WITH_10K_RES;
ioctl(s_fdTlv,MICPGA_LEFT_NEGTIVE_INPUT , &audio_ctrl);
//reg page1, 0x37
audio_ctrl.micpga_right.in1r_micpga = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_right.in2r_micpga = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_right.in3r_micpga = AIC32x4_NOT_ROUTED;
audio_ctrl.micpga_right.in2l_micpga = AIC32x4_NOT_ROUTED;
ioctl(s_fdTlv, MICPGA_RIGHT_POSITIVE_INPUT , &audio_ctrl);
//reg page1, 0x39
audio_ctrl.micpga_right.cm_micpga_via_cm1r = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_right.cm_micpga_via_cm2r = AIC32x4_ROUTED_WITH_10K_RES;
audio_ctrl.micpga_right.in3l_micpga = AIC32x4_NOT_ROUTED;
audio_ctrl.micpga_right.in1l_micpga = AIC32x4_NOT_ROUTED;
ioctl(s_fdTlv, MICPGA_RIGHT_NEGTIVE_INPUT , &audio_ctrl);
/************ LOL/R differential **************/
//LOL ROUTE
audio_ctrl.lo.rdac_lol = 1;
audio_ctrl.lo.ldac_lol = 0;
audio_ctrl.lo.mal_lol = 0;
audio_ctrl.lo.lor_lol = 0;
ioctl(s_fdTlv, LOL_INPUT, &audio_ctrl);
//LOR ROUTE
audio_ctrl.lo.rdac_lor = 1;
audio_ctrl.lo.mar_lor = 0;
ioctl(s_fdTlv, LOR_INPUT, &audio_ctrl);
/************ HPL/R SINGLE ENDED **************/
audio_ctrl.hp.ldac_hpl = 1;
audio_ctrl.hp.in1l_hpl = 0;
audio_ctrl.hp.mal_hpl = 0;
audio_ctrl.hp.mar_hpl = 0;
ioctl(s_fdTlv, HPL_INPUT, &audio_ctrl); audio_ctrl.hp.ldac_hpr = 0;
audio_ctrl.hp.rdac_hpr = 1;
audio_ctrl.hp.in1r_hpr = 0;
audio_ctrl.hp.mar_hpr = 0;
audio_ctrl.hp.hpl_hpr = 0;
ioctl(s_fdTlv, HPR_INPUT, &audio_ctrl);

/******* HPL/R POWER **************/
audio_ctrl.powerup.hpl_power_up = AIC32x4_ENABLE;
ioctl(s_fdTlv, HEADPHONE_LEFT_POWER_UP, &audio_ctrl);
audio_ctrl.powerup.hpr_power_up = AIC32x4_ENABLE;
ioctl(s_fdTlv, HEADPHONE_RIGHT_POWER_UP, &audio_ctrl);

audio_ctrl.powerup.lol_power_up = AIC32x4_ENABLE;
ioctl(s_fdTlv,LINE_OUT_LEFT_POWER_UP , &audio_ctrl);
audio_ctrl.powerup.lor_power_up = AIC32x4_ENABLE;
ioctl(s_fdTlv,LINE_OUT_RIGHT_POWER_UP , &audio_ctrl);

Amy Luo：

您好，

看您所附框图中信号路径，不仅有DAC还有ADC操作，那么您的输入信号是什么？是否验证了ADC可以正常工作？您可以附上您的寄存器配置吗？下面应用手册中第4部分有DAC和ADC配置示例，您可以参考：

TLV320AIC3254 Application Reference Guide (Rev. A)

,

wuhua Gong：

1. ADC可以正常工作。只是有个不足地方，IN3差分信号输入的声音很小。

2. 驱动初始化寄存器配置（这个才是目前驱动使用的配置，前几次发的不是正在使用的）：

static int tlv320aic32x4_soft_reset1_adc(void){ int ret = 0; unsigned char data; /* reset all registers*/ cur_page = 0; //Assumption AVdd = 1.8V, DVdd = 1.8V MCLK = 12.288MHz Default settings used. PLL Disabled I2S //Interface with 16bit Word Length. AOSR 128 PRB_R1 PTM_R4 // Initialize to Page 0 // S/W Reset to initialize all registers ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x01, 0x01); msleep(10); // Power up NADC divider with value 1 ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x12, 0x81); // Power up MADC divider with value 2 ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x13, 0x82); // Program OSR for ADC to 128 ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x14, 0x80); // Set the word length of Audio Interface to 20bits PTM_P4 ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x1b, 0x10); // Set the DAC Mode to PRB_P8 ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x3c, 0x08) // Select ADC PRB_R1 ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x3d, 0x01); // Disable Internal Crude AVdd in presence of external AVdd supply or before // powering up internal AVdd LDO ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x01, 0x08); // Enable Master Analog Power Control ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x02, 0x00); ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x14, 0x25); // Set the input common mode to 0.9V ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0a, 0x00); // Select ADC PTM_R4 ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x3d, 0x00); /*############ output route #################*/#if 0

// Route Left DAC to HPL ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0c, 0x08); // Route Right DAC to HPR ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0d, 0x08); // Route Left DAC to LOL ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0e, 0x10); // Route Right DAC to LOR ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0f, 0x08);#else // Route Left DAC to HPL ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0c, 0x00); // Route Right DAC to HPR ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0d, 0x00); // Route Left DAC to LOL ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0e, 0x00); // Route Right DAC to LOR ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0f, 0x00);#endif

// Set MicPGA startup delay to 3.1ms ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x47, 0x32); // Set the REF charging time to 40ms ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x7b, 0x01); /*############ input route #################*/

#if 0

// Route IN1L to LEFT_P with 20K input impedance ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x34, 0xa8); // Route Common Mode to LEFT_M with impedance of 20K ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x36, 0x82); // Route IN1R to RIGHT_P with input impedance of 20K ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x37, 0xa8); // Route Common Mode to RIGHT_M with impedance of 20K ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x39, 0x82);#else // Route IN1L to LEFT_P with 20K input impedance ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x34, 0x00); // Route Common Mode to LEFT_M with impedance of 20K ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x36, 0x00); // Route IN1R to RIGHT_P with input impedance of 20K ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x37, 0x00); // Route Common Mode to RIGHT_M with impedance of 20K ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x39, 0x00);#endif // Unmute Left MICPGA, Gain selection of 6dB to make channel gain 0dB // Register of 6dB with input impedance of 20K => Channel Gain of 0dB ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x3b, 0x0c); // Unmute Right MICPGA, Gain selection of 6dB to make channel gain 0dB // Register of 6dB with input impedance of 20K => Channel Gain of 0dB ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x3c, 0x0c); // Set the DAC PTM mode to PTM_P3/4 ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x03, 0x00); ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x04, 0x00); // Set the HPL gain to 0dB ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x10, 0x00); // Set the HPR gain to 0dB ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x11, 0x00); // Set the LOL gain to 0dB ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x12, 0x00); // Set the LOR gain to 0dB ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x13, 0x00); // Power down HPL and HPR LOL LOR drivers ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x09, 0x00); // Select Page 0 /////need sleep 2.5s msleep(500); // Power up Left and Right ADC Channels // Power up the Left and Right DAC Channels with route the Left Audio digital data to // Left Channel DAC and Right Audio digital data to Right Channel DAC ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x3f, 0xd6); // Unmute the DAC digital volume control ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x40, 0x00); ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x51, 0xc0); // Unmute Left and Right ADC Digital Volume Control. ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x52, 0x00); return ret;}

,

Amy Luo：

前端输入电路是怎样的？前端输入电路是否有滤波器？

,

wuhua Gong：

1. 上次回复的寄存器配置是否有问题？

2. 前端电路原理图：

,

Amy Luo：

看您的描述，ADC可以正常工作，只是 IN3差分信号输入的声音很小。您是怎样确定的其差分输入的声音很小？

之前您描述说是rdac_lol，rdac_lor差分输出很小，您是发现输出差分幅值小是因为输入信号小造成的了吗？

输出端您是LOL和LOR直接接speaker吗？后级是没有加功放吗？

仅IN3输入时异常吗？其他输入通道怎样呢？是正常工作的吗？

我现在不明白您的问题具体是怎样的？您附的寄存器配置我还没有仔细看。

ADC可以正常工作，那么通过 IN3输入，经过ADC后，通过其他设备将数字音频信号播放出来声音是很小的是吗？

DAC是否验证了可以正常工作？即播放已知好的数字音频数据可以正常播放出来？

,

wuhua Gong：

1. ADC是正常的，只是声音小点，不影响产品正常使用，这个问题不用处理。

2. 我的问题是，DAC的LOL，LOR输出信号为什么不是差分反相？输出端LOL和LOR会接入一个调音台。调音台可以加减增益，相当于功放。你看下是否寄存器配置不对导致这个问题？

,

Amy Luo：

wuhua Gong said:// Power down HPL and HPR LOL LOR drivers ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x09, 0x00);

您这里是powered down LOL和LOR了吗？

,

wuhua Gong：

看代码的设置的值是0，参考文档描述，是powered down LOL和LOR，但是在后面的代码里面做了如下操作：

audio_ctrl.powerup.lol_power_up = AIC32x4_ENABLE;ioctl(s_fdTlv,LINE_OUT_LEFT_POWER_UP , &audio_ctrl);audio_ctrl.powerup.lor_power_up = AIC32x4_ENABLE;ioctl(s_fdTlv,LINE_OUT_RIGHT_POWER_UP , &audio_ctrl);

,

Amy Luo：

wuhua Gong said:

#if 0

// Route Left DAC to HPL ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0c, 0x08); // Route Right DAC to HPR ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0d, 0x08); // Route Left DAC to LOL ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0e, 0x10); // Route Right DAC to LOR ret = tlv320aic32x4_write(I2C_DEV_ADDR, 0x0f, 0x08);#else // Route Left DAC to HPL ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0c, 0x00); // Route Right DAC to HPR ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0d, 0x00); // Route Left DAC to LOL ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0e, 0x00); // Route Right DAC to LOR ret = tlv320aic32x4_write(I2C_DEV_ADDR, AIC32X4_PAGE1 + 0x0f, 0x00);#endif

这里Page 1 0x0e 和 Page 1 0x0f 最终配置的是什么值？您配置成0x10 和0x08 输出是怎样的？

,

wuhua Gong：

Page 1 0x0e 和 Page 1 0x0f 最终配置的是什么值由下面代码决定：

/************ LOL/R differential **************/ //LOL ROUTE audio_ctrl.lo.rdac_lol = 1; audio_ctrl.lo.ldac_lol = 0; audio_ctrl.lo.mal_lol = 0; audio_ctrl.lo.lor_lol = 0; ioctl(s_fdTlv, LOL_INPUT, &audio_ctrl); //LOR ROUTE audio_ctrl.lo.rdac_lor = 1; audio_ctrl.lo.mar_lor = 0; ioctl(s_fdTlv, LOR_INPUT, &audio_ctrl);

/************ HPL/R SINGLE ENDED **************/ audio_ctrl.hp.ldac_hpl = 1; audio_ctrl.hp.in1l_hpl = 0; audio_ctrl.hp.mal_hpl = 0; audio_ctrl.hp.mar_hpl = 0; ioctl(s_fdTlv, HPL_INPUT, &audio_ctrl); audio_ctrl.hp.ldac_hpr = 0; audio_ctrl.hp.rdac_hpr = 1; audio_ctrl.hp.in1r_hpr = 0; audio_ctrl.hp.mar_hpr = 0; audio_ctrl.hp.hpl_hpr = 0; ioctl(s_fdTlv, HPR_INPUT, &audio_ctrl);

所以最终的值0x0E=0x10; 0x0F=0x08, 目前这个配置，LOR, LOL输出信号不是差分反相，为什么？

,

Amy Luo：

您尝试将Page 1, Register 14, D(0) = 1 后输出怎样呢？

,

wuhua Gong：

尝试将Page 1, Register 14, D(0) = 1, 结果还是不行，输出波形还是相同的。

,

Amy Luo：

这个帖子时间太长了，我需要再仔细看下您之前的回复，请给我一些时间

,

Amy Luo：

为更加有效地解决您的问题，建议您将问题发布在E2E英文技术论坛上，将由资深的英文论坛工程师为您提供帮助，英文论坛对应子论坛链接：

https://e2e.ti.com/support/audio-group/audio/f/audio-forum