2812DSPBIOS 烧写报错求助急！-TI中文支持网

目前使用的CCS版本是3.3.81.6 其中BIOS已经升级到5.33.06版本使用的DSP是2812。程序编译没有错误，cmd文件根据TI例程以及spra958h文件改写，在烧写结束时报了一个warning导致烧写失败，此时带仿真器可以运行但是断电后无法运行，warning如下：

warning: this program contains initialized RAM data.It may run successfully under code composer studio, but not as a standalone system because of this.if you flashprogram requires initialized data in RAM. you will need to write flash code to initialize RAM memory.

程序使用BIOS 因此包含了三个cmd文件，如下：希望专家以及同僚帮我看看是否有问题

（1）DSP281x_Headers_BIOS.cmd

MEMORY

{

PAGE 0: /* Program Memory */

PAGE 1: /* Data Memory */

DEV_EMU : origin = 0x000880, length = 0x000180 /* device emulation registers */

FLASH_REGS : origin = 0x000A80, length = 0x000060 /* FLASH registers */

CSM : origin = 0x000AE0, length = 0x000010 /* code security module registers */

XINTF : origin = 0x000B20, length = 0x000020 /* external interface registers */

CPU_TIMER0 : origin = 0x000C00, length = 0x000008 /* CPU Timer0 registers */

CPU_TIMER1 : origin = 0x000C08, length = 0x000008 /* CPU Timer1 registers */

CPU_TIMER2 : origin = 0x000C10, length = 0x000008 /* CPU Timer2 registers (CPU Timer2 reserved for BIOS)*/

PIE_CTRL : origin = 0x000CE0, length = 0x000020 /* PIE control registers */

ECANA : origin = 0x006000, length = 0x000040 /* eCAN control and status registers */

ECANA_LAM : origin = 0x006040, length = 0x000040 /* eCAN local acceptance masks */

ECANA_MOTS : origin = 0x006080, length = 0x000040 /* eCAN message object time stamps */

ECANA_MOTO : origin = 0x0060C0, length = 0x000040 /* eCAN object time-out registers */

ECANA_MBOX : origin = 0x006100, length = 0x000100 /* eCAN mailboxes */

SYSTEM : origin = 0x007010, length = 0x000020 /* System control registers */

SPIA : origin = 0x007040, length = 0x000010 /* SPI registers */

SCIA : origin = 0x007050, length = 0x000010 /* SCI-A registers */

XINTRUPT : origin = 0x007070, length = 0x000010 /* external interrupt registers */

GPIOMUX : origin = 0x0070C0, length = 0x000020 /* GPIO mux registers */

GPIODAT : origin = 0x0070E0, length = 0x000020 /* GPIO data registers */

ADC : origin = 0x007100, length = 0x000020 /* ADC registers */

EVA : origin = 0x007400, length = 0x000040 /* Event Manager A registers */

EVB : origin = 0x007500, length = 0x000040 /* Event Manager B registers */

SCIB : origin = 0x007750, length = 0x000010 /* SCI-B registers */

MCBSPA : origin = 0x007800, length = 0x000040 /* McBSP registers */

CSM_PWL : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations. */

}

SECTIONS

{

/*** The PIE Vector table is called PIEVECT by DSP/BIOS ***/

PieVectTableFile : > PIEVECT, PAGE = 1, TYPE = DSECT

/*** Peripheral Frame 0 Register Structures ***/

DevEmuRegsFile : > DEV_EMU, PAGE = 1

FlashRegsFile : > FLASH_REGS, PAGE = 1

CsmRegsFile : > CSM, PAGE = 1

XintfRegsFile : > XINTF, PAGE = 1

CpuTimer0RegsFile : > CPU_TIMER0, PAGE = 1

CpuTimer1RegsFile : > CPU_TIMER1, PAGE = 1

CpuTimer2RegsFile : > CPU_TIMER2, PAGE = 1

PieCtrlRegsFile : > PIE_CTRL, PAGE = 1

/*** Peripheral Frame 1 Register Structures ***/

ECanaRegsFile : > ECANA, PAGE = 1

ECanaLAMRegsFile : > ECANA_LAM PAGE = 1

ECanaMboxesFile : > ECANA_MBOX PAGE = 1

ECanaMOTSRegsFile : > ECANA_MOTS PAGE = 1

ECanaMOTORegsFile : > ECANA_MOTO PAGE = 1

/*** Peripheral Frame 2 Register Structures ***/

SysCtrlRegsFile : > SYSTEM, PAGE = 1

SpiaRegsFile : > SPIA, PAGE = 1

SciaRegsFile : > SCIA, PAGE = 1

XIntruptRegsFile : > XINTRUPT, PAGE = 1

GpioMuxRegsFile : > GPIOMUX, PAGE = 1

GpioDataRegsFile : > GPIODAT PAGE = 1

AdcRegsFile : > ADC, PAGE = 1

EvaRegsFile : > EVA, PAGE = 1

EvbRegsFile : > EVB, PAGE = 1

ScibRegsFile : > SCIB, PAGE = 1

McbspaRegsFile : > MCBSPA, PAGE = 1

/*** Code Security Module Register Structures ***/

CsmPwlFile : > CSM_PWL, PAGE = 1

}

（2）F2812_BIOS_1.cmd 用户定义的cmd

SECTIONS

{

/*** User Defined Sections ***/

codestart : > BEGIN_FLASH, PAGE = 0 /* Used by file CodeStartBranch.asm */

internalMemFuncs : > FLASH_ABCDEFGHIJ, PAGE = 0 /* Used by file Xintf.c. Link to internal memory */

csm_rsvd : > CSM_RSVD, PAGE = 0 /* Used by file Passwords.asm */

passwords : > PASSWORDS, PAGE = 0 /* Used by file Passwords.asm */

DSP1SRFile : > DSP1REG, PAGE = 1

secureRamFuncs : LOAD = FLASH_ABCDEFGHIJ, PAGE = 0 /* Used by file Flash.c */

RUN = L0SARAM, PAGE = 0 /* Load to flash, run from CSM secure RAM */

LOAD_START(_secureRamFuncs_loadstart),

LOAD_SIZE(_secureRamFuncs_loadsize),

RUN_START(_secureRamFuncs_runstart)

IQmathTables : > IQTABLES PAGE = 0, TYPE = NOLOAD

IQmath : > FLASH_ABCDEFGHIJ PAGE = 0

}

（3）BIOS自动生成的cmd：

-u _FXN_F_nop

GBL_USERLIMPMODEABORTFXN = _FXN_F_nop;

-u _UserInit

GBL_USERINITFXN = _UserInit;

-u L1SARAM

MEM_SEGZERO = L1SARAM;

-u L1SARAM

MEM_MALLOCSEG = L1SARAM;

-u CLK_F_getshtime

CLK_TIMEFXN = CLK_F_getshtime;

-u CLK_F_run

CLK_HOOKFXN = CLK_F_run;

-u KNL_tick_stub

PRD_THOOKFXN = KNL_tick_stub;

-u L1SARAM

RTDX_DATAMEMSEG = L1SARAM;

-u L1SARAM

HST_DSMBUFSEG = L1SARAM;

-u GBL_NULL

SWI_EHOOKFXN = GBL_NULL;

-u GBL_NULL

SWI_IHOOKFXN = GBL_NULL;

-u SWI_F_exec

SWI_EXECFXN = SWI_F_exec;

-u SWI_F_run

SWI_RUNFXN = SWI_F_run;

-u L1SARAM

TSK_STACKSEG = L1SARAM;

-u _FXN_F_nop

TSK_VCREATEFXN = _FXN_F_nop;

-u _FXN_F_nop

TSK_VDELETEFXN = _FXN_F_nop;

-u _FXN_F_nop

TSK_VEXITFXN = _FXN_F_nop;

-u IDL_F_stub

IDL_CALIBRFXN = IDL_F_stub;

-u _UTL_doAbort

SYS_ABORTFXN = _UTL_doAbort;

-u _UTL_doError

SYS_ERRORFXN = _UTL_doError;

-u _UTL_halt

SYS_EXITFXN = _UTL_halt;

-u _UTL_doPutc

SYS_PUTCFXN = _UTL_doPutc;

-u _FXN_F_nop

GIO_CREATEFXN = _FXN_F_nop;

-u _FXN_F_nop

GIO_DELETEFXN = _FXN_F_nop;

-u _FXN_F_nop

GIO_PENDFXN = _FXN_F_nop;

-u _FXN_F_nop

GIO_POSTFXN = _FXN_F_nop;

/* OBJECT ALIASES */

_PIEVECT = PIEVECT;

_OTP = OTP;

_H0SARAM = H0SARAM;

_L1SARAM = L1SARAM;

_L0SARAM = L0SARAM;

_M1SARAM = M1SARAM;

_M0SARAM = M0SARAM;

_ZONE6 = ZONE6;

_PASSWORDS = PASSWORDS;

_BEGIN_H0 = BEGIN_H0;

_BEGIN_FLASH = BEGIN_FLASH;

_FLASH_ABCDEFGHIJ = FLASH_ABCDEFGHIJ;

_CSM_RSVD = CSM_RSVD;

_IQTABLES = IQTABLES;

_DSP1REG = DSP1REG;

_ZONE1 = ZONE1;

_PRD_clock = PRD_clock;

_PRD0 = PRD0;

_RTA_fromHost = RTA_fromHost;

_RTA_toHost = RTA_toHost;

_HWI_RESET = HWI_RESET;

_HWI_INT1 = HWI_INT1;

_HWI_INT2 = HWI_INT2;

_HWI_INT3 = HWI_INT3;

_HWI_INT4 = HWI_INT4;

_HWI_INT5 = HWI_INT5;

_HWI_INT6 = HWI_INT6;

_HWI_INT7 = HWI_INT7;

_HWI_INT8 = HWI_INT8;

_HWI_INT9 = HWI_INT9;

_HWI_INT10 = HWI_INT10;

_HWI_INT11 = HWI_INT11;

_HWI_INT12 = HWI_INT12;

_HWI_INT13 = HWI_INT13;

_HWI_TINT = HWI_TINT;

_HWI_DLOG = HWI_DLOG;

_HWI_RTOS = HWI_RTOS;

_HWI_RESERVED = HWI_RESERVED;

_HWI_NMI = HWI_NMI;

_HWI_ILLEGAL = HWI_ILLEGAL;

_HWI_USER1 = HWI_USER1;

_HWI_USER2 = HWI_USER2;

_HWI_USER3 = HWI_USER3;

_HWI_USER4 = HWI_USER4;

_HWI_USER5 = HWI_USER5;

_HWI_USER6 = HWI_USER6;

_HWI_USER7 = HWI_USER7;

_HWI_USER8 = HWI_USER8;

_HWI_USER9 = HWI_USER9;

_HWI_USER10 = HWI_USER10;

_HWI_USER11 = HWI_USER11;

_HWI_USER12 = HWI_USER12;

_PIE_INT1_1 = PIE_INT1_1;

_PIE_INT1_2 = PIE_INT1_2;

_PIE_INT1_3 = PIE_INT1_3;

_PIE_INT1_4 = PIE_INT1_4;

_PIE_INT1_5 = PIE_INT1_5;

_PIE_INT1_6 = PIE_INT1_6;

_PIE_INT1_7 = PIE_INT1_7;

_PIE_INT1_8 = PIE_INT1_8;

_PIE_INT2_1 = PIE_INT2_1;

_PIE_INT2_2 = PIE_INT2_2;

_PIE_INT2_3 = PIE_INT2_3;

_PIE_INT2_4 = PIE_INT2_4;

_PIE_INT2_5 = PIE_INT2_5;

_PIE_INT2_6 = PIE_INT2_6;

_PIE_INT2_7 = PIE_INT2_7;

_PIE_INT2_8 = PIE_INT2_8;

_PIE_INT3_1 = PIE_INT3_1;

_PIE_INT3_2 = PIE_INT3_2;

_PIE_INT3_3 = PIE_INT3_3;

_PIE_INT3_4 = PIE_INT3_4;

_PIE_INT3_5 = PIE_INT3_5;

_PIE_INT3_6 = PIE_INT3_6;

_PIE_INT3_7 = PIE_INT3_7;

_PIE_INT3_8 = PIE_INT3_8;

_PIE_INT4_1 = PIE_INT4_1;

_PIE_INT4_2 = PIE_INT4_2;

_PIE_INT4_3 = PIE_INT4_3;

_PIE_INT4_4 = PIE_INT4_4;

_PIE_INT4_5 = PIE_INT4_5;

_PIE_INT4_6 = PIE_INT4_6;

_PIE_INT4_7 = PIE_INT4_7;

_PIE_INT4_8 = PIE_INT4_8;

_PIE_INT5_1 = PIE_INT5_1;

_PIE_INT5_2 = PIE_INT5_2;

_PIE_INT5_3 = PIE_INT5_3;

_PIE_INT5_4 = PIE_INT5_4;

_PIE_INT5_5 = PIE_INT5_5;

_PIE_INT5_6 = PIE_INT5_6;

_PIE_INT5_7 = PIE_INT5_7;

_PIE_INT5_8 = PIE_INT5_8;

_PIE_INT6_1 = PIE_INT6_1;

_PIE_INT6_2 = PIE_INT6_2;

_PIE_INT6_3 = PIE_INT6_3;

_PIE_INT6_4 = PIE_INT6_4;

_PIE_INT6_5 = PIE_INT6_5;

_PIE_INT6_6 = PIE_INT6_6;

_PIE_INT6_7 = PIE_INT6_7;

_PIE_INT6_8 = PIE_INT6_8;

_PIE_INT7_1 = PIE_INT7_1;

_PIE_INT7_2 = PIE_INT7_2;

_PIE_INT7_3 = PIE_INT7_3;

_PIE_INT7_4 = PIE_INT7_4;

_PIE_INT7_5 = PIE_INT7_5;

_PIE_INT7_6 = PIE_INT7_6;

_PIE_INT7_7 = PIE_INT7_7;

_PIE_INT7_8 = PIE_INT7_8;

_PIE_INT8_1 = PIE_INT8_1;

_PIE_INT8_2 = PIE_INT8_2;

_PIE_INT8_3 = PIE_INT8_3;

_PIE_INT8_4 = PIE_INT8_4;

_PIE_INT8_5 = PIE_INT8_5;

_PIE_INT8_6 = PIE_INT8_6;

_PIE_INT8_7 = PIE_INT8_7;

_PIE_INT8_8 = PIE_INT8_8;

_PIE_INT9_1 = PIE_INT9_1;

_PIE_INT9_2 = PIE_INT9_2;

_PIE_INT9_3 = PIE_INT9_3;

_PIE_INT9_4 = PIE_INT9_4;

_PIE_INT9_5 = PIE_INT9_5;

_PIE_INT9_6 = PIE_INT9_6;

_PIE_INT9_7 = PIE_INT9_7;

_PIE_INT9_8 = PIE_INT9_8;

_PIE_INT10_1 = PIE_INT10_1;

_PIE_INT10_2 = PIE_INT10_2;

_PIE_INT10_3 = PIE_INT10_3;

_PIE_INT10_4 = PIE_INT10_4;

_PIE_INT10_5 = PIE_INT10_5;

_PIE_INT10_6 = PIE_INT10_6;

_PIE_INT10_7 = PIE_INT10_7;

_PIE_INT10_8 = PIE_INT10_8;

_PIE_INT11_1 = PIE_INT11_1;

_PIE_INT11_2 = PIE_INT11_2;

_PIE_INT11_3 = PIE_INT11_3;

_PIE_INT11_4 = PIE_INT11_4;

_PIE_INT11_5 = PIE_INT11_5;

_PIE_INT11_6 = PIE_INT11_6;

_PIE_INT11_7 = PIE_INT11_7;

_PIE_INT11_8 = PIE_INT11_8;

_PIE_INT12_1 = PIE_INT12_1;

_PIE_INT12_2 = PIE_INT12_2;

_PIE_INT12_3 = PIE_INT12_3;

_PIE_INT12_4 = PIE_INT12_4;

_PIE_INT12_5 = PIE_INT12_5;

_PIE_INT12_6 = PIE_INT12_6;

_PIE_INT12_7 = PIE_INT12_7;

_PIE_INT12_8 = PIE_INT12_8;

_PRD_swi = PRD_swi;

_KNL_swi = KNL_swi;

_TSK_idle = TSK_idle;

_IDL_cpuLoad = IDL_cpuLoad;

_LNK_dataPump = LNK_dataPump;

_RTA_dispatcher = RTA_dispatcher;

_IDL0 = IDL0;

_IDL1 = IDL1;

_IDL2 = IDL2;

_LOG_system = LOG_system;

_trace = trace;

_IDL_busyObj = IDL_busyObj;

/* MODULE GBL */

SECTIONS {

.vers (COPY): {} /* version information */

}

-priority

-llnkrtdx.a28L

-ldrivers.a28L /* device drivers support */

-lsioboth.a28L /* supports both SIO models */

-lbios.a28L /* DSP/BIOS support */

-lrtdxx.lib /* RTDX support */

-lrts2800_ml.lib /* C and C++ run-time library support */

/* MODULE MEM */

-stack 0x200

MEMORY {

PAGE 1: PIEVECT: origin = 0xd00, len = 0x100

PAGE 0: OTP: origin = 0x3d7800, len = 0x400

PAGE 1: H0SARAM: origin = 0x3f8002, len = 0x1ffe

PAGE 1: L1SARAM: origin = 0x9000, len = 0x1000

PAGE 0: L0SARAM: origin = 0x8000, len = 0x1000

PAGE 1: M1SARAM: origin = 0x400, len = 0x400

PAGE 1: M0SARAM: origin = 0x0, len = 0x400

PAGE 1: ZONE6: origin = 0x100000, len = 0x10000

PAGE 0: PASSWORDS: origin = 0x3f7ff8, len = 0x8

PAGE 0: BEGIN_H0: origin = 0x3f8000, len = 0x2

PAGE 0: BEGIN_FLASH: origin = 0x3f7ff6, len = 0x2

PAGE 0: FLASH_ABCDEFGHIJ: origin = 0x3d8000, len = 0x1ff80

PAGE 0: CSM_RSVD: origin = 0x3f7f80, len = 0x76

PAGE 0: IQTABLES: origin = 0x3ff000, len = 0xb50

PAGE 1: DSP1REG: origin = 0x5000, len = 0x2d

PAGE 1: ZONE1: origin = 0x502d, len = 0x97

}

/* MODULE CLK */

SECTIONS {

.clk: {

CLK_F_gethtime = CLK_F_getshtime;

*(.clk)

} > L1SARAM PAGE 1, RUN_START(CLK_A_TABBEG)

}

_CLK_PRD = CLK_PRD;

_CLK_COUNTSPMS = CLK_COUNTSPMS;

_CLK_REGS = CLK_REGS;

_CLK_USETIMER = CLK_USETIMER;

_CLK_TIMERNUM = CLK_TIMERNUM;

_CLK_TCR = CLK_TCR;

_CLK_TDDR = CLK_TDDR;

/* MODULE PRD */

SECTIONS {

.prd: RUN_START(PRD_A_TABBEG), RUN_END(PRD_A_TABEND) {

} > L1SARAM PAGE 1

}

PRD_A_TABLEN = 1;

/* MODULE RTDX */

_RTDX_interrupt_mask = 0x0;

/* MODULE SWI */

SECTIONS {

.swi: RUN_START(SWI_A_TABBEG), RUN_END(SWI_A_TABEND) {

} > L1SARAM PAGE 1

}

SWI_A_TABLEN = 2;

/* MODULE TSK */

SECTIONS {

.tsk: {

*(.tsk)

} > L1SARAM PAGE 1

}

/* MODULE IDL */

SECTIONS {

.idl: {

*(.idl)

} > L1SARAM PAGE 1, RUN_START(IDL_A_TABBEG)

.idlcal: {

*(.idlcal)

} > L1SARAM PAGE 1, RUN_START(IDL_A_CALBEG)

}

LOG_A_TABLEN = 2; _LOG_A_TABLEN = 2;

PIP_A_TABLEN = 2;

SECTIONS {

frt: {} > FLASH_ABCDEFGHIJ PAGE 0

.bios: {} > FLASH_ABCDEFGHIJ PAGE 0

.data: {} > FLASH_ABCDEFGHIJ PAGE 0

.pinit: {} > FLASH_ABCDEFGHIJ PAGE 0

.text: {} > FLASH_ABCDEFGHIJ PAGE 0

.cinit: {} > FLASH_ABCDEFGHIJ PAGE 0

.const: {} > FLASH_ABCDEFGHIJ PAGE 0

.switch: {} > FLASH_ABCDEFGHIJ PAGE 0

.gblinit: {} > FLASH_ABCDEFGHIJ PAGE 0

.sysinit: {} > FLASH_ABCDEFGHIJ PAGE 0

.rtdx_text: {} > FLASH_ABCDEFGHIJ PAGE 0

.hwi: {

/* no HWI stubs are necessary */

} > FLASH_ABCDEFGHIJ PAGE 0

GROUP {

.econst: {}

.printf (COPY): {}

} > FLASH_ABCDEFGHIJ PAGE 0

.bss: {} > H0SARAM PAGE 1

.ebss: {} > H0SARAM PAGE 1

.hwi_disp_sec: {} > H0SARAM PAGE 1

.sysdata: {} > L1SARAM PAGE 1

.dsm: {} > L1SARAM PAGE 1

.mem: {} > L1SARAM PAGE 1

.cio: {} > L1SARAM PAGE 1

.gio: {} > L1SARAM PAGE 1

.sys: {} > L1SARAM PAGE 1

.sysregs: {} > L1SARAM PAGE 1

.rtdx_data: {} > L1SARAM PAGE 1

.TSK_idle$stk: {

*(.TSK_idle$stk)

} > L1SARAM PAGE 1

/* LOG_system buffer */

.LOG_system$buf: align = 0x80 {} > L1SARAM PAGE 1

/* trace buffer */

.trace$buf: align = 0x40 {} > L1SARAM PAGE 1

.args: fill=0 {

*(.args)

. += 0x4;

} > L1SARAM PAGE 1

/* RTA_fromHost buffer */

.hst1: align = 0x4 {} > L1SARAM PAGE 1

/* RTA_toHost buffer */

.hst0: align = 0x4 {} > L1SARAM PAGE 1

.trace: fill = 0x0 {

_SYS_PUTCBEG = .;

. += 0x200;

_SYS_PUTCEND = . – 1;

} > L1SARAM PAGE 1

.hst: RUN_START(HST_A_TABBEG), RUN_START(_HST_A_TABBEG), RUN_END(HST_A_TABEND), RUN_END(_HST_A_TABEND) {

} > L1SARAM PAGE 1

.log: RUN_START(LOG_A_TABBEG), RUN_START(_LOG_A_TABBEG), RUN_END(LOG_A_TABEND), RUN_END(_LOG_A_TABEND) {

} > L1SARAM PAGE 1

.pip: RUN_START(PIP_A_TABBEG), RUN_START(_PIP_A_TABBEG), RUN_END(PIP_A_TABEND), RUN_END(_PIP_A_TABEND) {

} > L1SARAM PAGE 1

.sts: RUN_START(STS_A_TABBEG), RUN_START(_STS_A_TABBEG), RUN_END(STS_A_TABEND), RUN_END(_STS_A_TABEND) {

} > L1SARAM PAGE 1

.trcdata: START(_trcdata_loadstart), END(_trcdata_loadend), SIZE(_trcdata_loadsize), RUN_START(_trcdata_runstart) {

} load > FLASH_ABCDEFGHIJ PAGE 0, run > L1SARAM PAGE 1

.L1SARAM$heap: {

. += 0x200;

} RUN_START(L1SARAM$B), RUN_START(_L1SARAM_base), RUN_SIZE(L1SARAM$L), RUN_SIZE(_L1SARAM_length) > L1SARAM PAGE 1

.stack: {

GBL_stackbeg = .;

*(.stack)

GBL_stackend = GBL_stackbeg + 0x200 – 1;

_HWI_STKBOTTOM = GBL_stackbeg;

_HWI_STKTOP = (GBL_stackend + 1);

} > M1SARAM PAGE 1

.hwi_vec: START(_hwi_vec_loadstart), END(_hwi_vec_loadend), SIZE(_hwi_vec_loadsize), RUN_START(_hwi_vec_runstart) {

/* no HWI stubs are necessary */

} load > FLASH_ABCDEFGHIJ PAGE 0, run > PIEVECT PAGE 1

}

这样的错误在网上也有很多，但是针对BIOS的很少，我不知道是CCS设置的问题还是cmd文件的问题希望

在这方面有研究的朋友给予我帮助，谢谢了。

Jones Chen：

你需要查询一下，在DSP/BIOS里面，配置的内存映射，是否有需要放到Flash的Section，你给映射到Ram中了？