TI中文支持网Part Number:BUF802
设计参数按照BUF802DATASHEET 的11.2章节进行了设计，输入端口为高阻配置
测试输入端口S21参数如下图1所示，测试点为经过C26以后的高频部分：
The design parameters are designed in accordance with section 11.2 of BUF802DATASHEET, and the input port is high resistance configuration
The parameters of the test input port S21 are shown in Figure 1 below, and the test point is the high-frequency part after C26
图1信号端口到C26后的S21曲线
Figure 1 Curve of S21 after signal port to C26
测试输出端口经过一个50欧姆的电阻后信号高频部分S21曲线如下图所示：
After the test output port passes a 50 ohm resistance, the S21 curve of the high frequency part of the signal is shown as the figure below:
图2 输出端口S21曲线
Figure 2 Curve of output port S21
为什么测试输出端-3dB带宽差距如此大？
Why is the test output -3dB bandwidth gap so big?
目的是想调成-3dB带宽1Ghz的高阻抗输入链，原理图设计如下图3所示
The purpose is to adjust the high-impedance input chain with a bandwidth of -3dB and 1Ghz. The schematic design is shown in Figure 3 below
图3 buf802设计的原理图
FIG. 3 Schematic diagram of buf802 design
Amy Luo：
您好，
为更加有效地解决您的问题，我已将您的问题发布在E2E英文技术论坛上，请更了解这款芯片的TI资深工程师为您解答，一旦得到回复后我会立即回复给您。帖子链接如下，您也可以关注帖子，以方便查看或追问后续疑问。
英文论坛对应子论坛链接：https://e2e.ti.com/support/amplifiers-group/amplifiers/f/amplifiers-forum/1219405/buf802-s21-parameter-test
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Amy Luo：
E2E英文工程师的回复：
Thank you for your question. Is the customer's question why on their test the -3dB point shows as 500MHz instead of the 3GHz the device is rated for?
Additionally, I did want to highlight that in the customers picture, capacitor C27 shows a value of 10pF vs. in the EVM board that capacitor has a value of 100pF. This may not make a huge change, but I did want to highlight that difference.
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Amy Luo：
您好，您的问题解决了没？如果没有，可以对英文工程师的问题进行反馈吗？
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longgang liu：
Hello, the problem has been solved, thank you
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longgang liu：
暂时解决了，已回复
