Part Number:ADC12QJ800-Q1
需求:
器件输入时钟使用差分时钟:输入144MHz,
使用CPLL 生成采样率720Mpsp采样信号
JESD使用mode0,单lane速率5.76Gbps,使用8个lane,数据加扰,sysref信号2.25MHz
配置过程:
首先,根据手册9.3章节使用如下寄存器配置顺序和值,读取CPLL,SPLL未锁定,JESD 未发出同步码
图中第一列为寄存器地址,第三列为写入的寄存器值,在0x00 寄存器 写入0xB0后,读取0x270-寄存器为 0x01,然后继续写入,写入完成后没有反应
然后使用如下的寄存器配置表:
{0x00U, 1U, 0xB0U, 0x00U},
{0x02U, 1U, 0x00U, 0x00U},
{0x10U, 1U, 0x00U, 0x00U},
{0x29U, 1U, 0xE0U, 0x00U},
{0x2AU, 1U, 0x00U, 0x00U},
{0x2BU, 1U, 0x03U, 0x00U},
//0X30 0XA000
{0x30U, 1U, 0xA0U, 0x00U},
{0x31U, 1U, 0xA0U, 0x00U},
{0x37U, 1U, 0x4BU, 0x00U},
{0x3BU, 1U, 0x00U, 0x00U},
{0x3CU, 1U, 0x01U, 0x00U},
{0x3DU, 1U, 0x04U, 0x00U},
{0x3EU, 1U, 0x05U, 0x00U},
{0x3FU, 1U, 0x4AU, 0x00U},
{0x48U, 1U, 0x03U, 0x00U},
{0x57U, 1U, 0x00U, 0x00U},
{0x58U, 1U, 0x00U, 0x00U},
{0x59U, 1U, 0x00U, 0x00U},
{0x5CU, 1U, 0x00U, 0x00U},
{0x5DU, 1U, 0x41U, 0x00U},
//0X5E //READ
{0x61U, 1U, 0x01U, 0x00U},
{0x62U, 1U, 0x01U, 0x00U},
{0x65U, 1U, 0x01U, 0x00U},
{0x68U, 1U, 0x61U, 0x00U},
{0x6BU, 1U, 0x00U, 0x00U},
{0x6CU, 1U, 0x01U, 0x00U},
{0x7AU, 1U, 0x00U, 0x00U},
{0x7CU, 1U, 0x00U, 0x00U},
{0x7EU, 1U, 0x00U, 0x00U},
{0x7FU, 1U, 0x00U, 0x00U},
{0x80U, 1U, 0x00U, 0x00U},
{0x81U, 1U, 0x00U, 0x00U},
{0x9AU, 1U, 0x08U, 0x00U},
{0x9BU, 1U, 0x07U, 0x00U},
{0x9DU, 1U, 0x00U, 0x00U},
{0x160U, 1U, 0x00U, 0x00U},
{0x200U, 1U, 0x01U, 0x00U},
{0x201U, 1U, 0x00U, 0x00U},
{0x202U, 1U, 0x1FU, 0x00U},
{0x203U, 1U, 0x01U, 0x00U},
{0x204U, 1U, 0x03U, 0x00U},
{0x205U, 1U, 0x00U, 0x00U},
{0x206U, 1U, 0x00U, 0x00U},
{0x207U, 1U, 0x00U, 0x00U},
// {0x208U, 1U, 0x00U, 0x00U},
{0x209U, 1U, 0x03U, 0x00U},
{0x20FU, 1U, 0x00U, 0x00U},
{0x210U, 1U, 0x03U, 0x00U},
{0x211U, 1U, 0xF2U, 0x00U},
{0x213U, 1U, 0x07U, 0x00U},
//0X270 //READ
{0x29AU, 1U, 0x0FU, 0x00U},
{0x29BU, 1U, 0x04U, 0x00U},
{0x29CU, 1U, 0x1BU, 0x00U},
{0x2C1U, 1U, 0x3FU, 0x00U},
{0x2C2U, 1U, 0x3FU, 0x00U},
{0x2C4U, 1U, 0xFFU, 0x00U},
{0x330U, 1U, 0x00U, 0x00U},
{0x332U, 1U, 0x00U, 0x00U},
{0x334U, 1U, 0x00U, 0x00U},
{0x336U, 1U, 0x00U, 0x00U},
{0x338U, 1U, 0x00U, 0x00U},
{0x33AU, 1U, 0x00U, 0x00U},
{0x33EU, 1U, 0x00U, 0x00U},
{0x360U, 1U, 0x00U, 0x00U},
{0x361U, 1U, 0x00U, 0x00U},
{0x362U, 1U, 0x00U, 0x00U},
{0x363U, 1U, 0x00U, 0x00U},
{0x364U, 1U, 0x00U, 0x00U},
{0x365U, 1U, 0x00U, 0x00U},
{0x366U, 1U, 0x00U, 0x00U},
{0x367U, 1U, 0x00U, 0x00U},
第一列为地址,第三列为寄存器写入值,CPLL SPLL未锁定,没有反应,
请问有没有准确的按照顺序配置的寄存器配置表
Amy Luo:
您好,
为更加有效地解决您的问题,我已将您的问题发布在E2E英文技术论坛上,请更了解这款芯片的TI资深工程师为您解答,帖子链接如下,
https://e2e.ti.com/support/data-converters-group/data-converters/f/data-converters-forum/1194633/adc12qj800-q1-register-configuration-problem
,
?? ?:
现在还没有回复呢,肯定会有人答复吗
,
Amy Luo:
会有人答复的,不管E2E中文论坛还是E2E英文论坛每天都会有很多帖子需要去回复,我们一般是按早晚顺序去回复的,如果某一天帖子比较多,那么一些问题答复就会晚一些,请理解我们。关于您的问题,我也是关注了英文论坛帖子的回复,一旦得到回复后我会立即回复给您的,请您耐心等一下。
,
Amy Luo:
已给答复,您尝试以下寄存器配置:
Address Value // Comments
0x000 0xB0 // reset the ADC
delay (100 mSec) // wait for 100milli second)
0x03F 0x4A
0x058 0x81
0x05C 0x01
0x03D 0x04
0x03E 0x05
0x05D 0x41
0x05C 0x00
0x057 0x81 // ONLY USE IF TRIG OUT is getting used.
0x02B 0x15 // EN_VA11_NOISE_SUPPR
0x0200 0x00 // Clear JESD_EN (always before CAL_EN)
0x0061 0x00 // Clear CAL_EN (always after JESD_EN)
0x0201 0x00 // Set JMODE0
0x0202 0x03 // Set KM1=3 so K=4
0x0204 0x01 // Use SYNCSE input, offset binary data, scrambler enabled
0x0213 0x0F // Enable overrange, set overrange holdoff to max period 4*2^7 = 512 samples
0x0061 0x01 // Set CAL_EN (always before JESD_EN)
0x0200 0x01 // Set JESD_EN (always after CAL_EN)
0x006C 0x00 // Set CAL_SOFT_TRIG low to reset calibration state machine
0x006C 0x01 // Set CAL_SOFT_TRIG high to enable calibration