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TDA4VM: TIDL Graph init fail

Part Number:TDA4VM

Two applications exist for image collect and image processing in one TDA4

1 、app_1  image collect app  used nodes (3 senor nodes ; 3 capture nodes ; 3 (viss +aewb) nodes ; 2  ldc nodes ; 1 miscoa node ; 1 display node ) in one graph ,The application captures the image and sends the address to the Tidl processing application.

2 、app_2 Tidl processing app ,Take the image, process the image 。

(app_1)image collect app Can run normally. The error is TIDL Graph initialization error by the tdil processing process(app_2)

error  log 

========== [GraphOD]No Check outbuf size!!! ==========
26.897582 s: VX_ZONE_ERROR:[ownGraphCreateNodeCallbackCommands:983] Node create user callback command at index 0 failed
26.897602 s: VX_ZONE_ERROR:[vxVerifyGraph:2024] Create node callback commands failed
26.897616 s: VX_ZONE_ERROR:[vxVerifyGraph:2109] Graph verify failed
26.897738 s: VX_ZONE_ERROR:[Create:166] [GraphDL]Graph verify failed
[ProcUnitMgr]RegisterProcUnit create failed
[RunMgr_Front]m_pu_front_od_center RegisterProcUnit failed
[RunMgr]Camera front Init failed
[HWAC_IF]RunMgr Init Failed
[tidl_task_Pyrd()] threadid:26
[tidl_task()] threadid:27
[tidl_task_optflow()] threadid:28
[DOF Task] Over.

Our memory partition is configured as follows 

Marked in red is the modified configuration used

We tried to make adjustments and couldn't fix the bug;

TIOVX_OBJ_DESC_MEM 0xB2040000 0xB5FDFFFF 63.62 MB   Memory for TI OpenVX shared memory. MUST be non-cached or cache-coherent
  0xB2040000 0xB9FDFFFF 127.62 MB    
PCIE_QUEUE_SHARED_MEM 0xB5FE0000 0xB5FEFFFF 64.00 KB   Memory for IPC over PCIe using shared memory. MUST be non-cached or cache-coherent
  0xB9FE0000 0xB9FEFFFF 64.00 KB    
PCIE_QUEUE_MIRROR_REMOTE_SHARED_MEM 0xB5FF0000 0xB5FFFFFF 64.00 KB   Reserved Memory for RAT mapping of remote PCIe IPC shared memory. MUST be non-cached or cache-coherent
  0xB9FF0000 0xB9FFFFFF 64.00 KB    
TIOVX_LOG_RT_MEM 0xB6000000 0xB7FFFFFF 32.00 MB   Memory for TI OpenVX shared memory for Run-time logging. MUST be non-cached or cache-coherent
  0xBA000000 0xBBFFFFFF 32.00 MB    
DDR_SHARED_MEM 0xB8000000 0xD7FFFFFF 512.00 MB   Memory for shared memory buffers in DDR
  0xBC000000 0xD7FFFFFF 448.00 MB    

 

Shine:

我把您的问题升级到英文e2e论坛了,请关注下面帖子的回复。https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1160502/tda4vm-tidl-graph-init-fail

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