TI中文支持网Part Number:LAUNCHXL-F28379DOther Parts Discussed in Thread:SYSCONFIG, C2000WARE
在resource exploerer中添加例程C2000Ware/…./F2837xD/CPU1/empty_sysconfig_337zwt，之后修改例程名为myechoback，编译，编译通过，再Flash选择CPU1和CPU2，确认，Console窗口提示出现问题
C28xx_CPU1: GEL Output:Memory Map Initialization Complete
C28xx_CPU1: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
C28xx_CPU2: GEL Output:Memory Map Initialization Complete
C28xx_CPU2: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code. Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
Yale Li：
您好，https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/821951/ccs-cpu1-will-be-halted-to-determine-sr-ownership-for-the-cpu-which-will-run-the-flash-plugin-code-after-which-cpu1-will-be-set-to-run-its-application-user-code-execution-from-sr-could-commence-after-both-flash-banks-are-prog
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XiaoTY：
你好，这篇帖子并没有回答怎么解决
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Yale Li：
拉到最底下有解决方法：
