TI中文支持网PC 到dsp2808 SCI通信，dsp启用了收发FIFO，dsp上电首次接收一串byte时，第一个byte接不到objSciModbus.ubModbusRxBuf中，PC再发则正常。若DSP上电时pc只发一个byte，却可将这个单byte接收到objSciModbus.ubModbusRxBuf中，帮忙看看怎么回事呀？如何解决？
/* === SCI-A Registers initialization === */
SciaRegs.SCIPRI.all = 0x0008; // Emulation run free
SciaRegs.SCIFFTX.all = 0xE040; // En fifo level = 0
SciaRegs.SCIFFRX.all = 0x6061; // fifo level = 1
SciaRegs.SCIFFCT.all = 0x0003; // delay
SciaRegs.SCICCR.all = 0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciaRegs.SCIHBAUD = 0x0001; // 9600 baud @LSPCLK = 25MHz.
SciaRegs.SCILBAUD = 0x0045; // Baudrate = 9585.8, deviation 0.14%
SciaRegs.SCICTL1.all = 0x0063; // Relinquish SCI from Reset
//——————————————————————————————-
接收中断函数
interrupt void SciRxInt9_Isr(void)
{
UWORD uwRxBufTmp;
IER |= M_INT9; // Enable CPU INT
EINT;
// ubModBusConnectStatus = 1;
while (SciaRegs.SCIFFRX.bit.RXFFST != 0)
{
//uwRxBufTmp = SciaRegs.SCIRXBUF.bit.RXDT;
uwRxBufTmp = SciaRegs.SCIRXBUF.all;
objSciModbus.ubModbusSilentCnt = 0;
if (SciaRegs.SCIRXST.bit.RXERROR == 0 && uwRxBufTmp < 0x0100)// SCIFFFE, SCIFFPE in b15, b14
{
objSciModbus.ubModbusRxBuf[objSciModbus.ubModbusRxDataIndex] = (UBYTE)uwRxBufTmp;
objSciModbus.ubModbusReceived = 1;
if (objSciModbus.ubModbusRxDataCnt < 0xFF)
{
objSciModbus.ubModbusRxDataCnt++;
objSciModbus.ubModbusRxDataIndex++;
}
if (objSciModbus.ubModbusRxDataIndex == MAXRX_LENGTH)
{
objSciModbus.ubModbusRxDataIndex = 0;
}
}
else
{
SciaRegs.SCICTL1.bit.SWRESET = 0; // reset
SciaRegs.SCICTL1.bit.SWRESET = 1; // re-en
SciaRegs.SCIFFRX.bit.RXFFOVRCLR = 1; // Clear Overflow flag
SciaRegs.SCIFFRX.bit.RXFIFORESET = 0; // Fifo pointer to zero
SciaRegs.SCIFFRX.bit.RXFIFORESET = 1; // Re-en RX fifo
objSciModbus.voModbusRestore();
//ubModbusErr = RXRECERR;
}
}
SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1; // Clear Interrupt flag
PieCtrlRegs.PIEACK.all |= PIEACK_GROUP9; // Issue PIE ack
}
