TI中文支持网手册中未给出配置使用步骤，例程中有I2C和EEPROM的通信，在历程中看到发数据是这样的过程
Uint16 I2CA_WriteData(struct I2CMSG *msg)
{
Uint16 i;
// Wait until the STP bit is cleared from any previous master communication.
// Clearing of this bit by the module is delayed until after the SCD bit is
// set. If this bit is not checked prior to initiating a new message, the
// I2C could get confused.
if (I2caRegs.I2CMDR.bit.STP == 1)
{
return I2C_STP_NOT_READY_ERROR;
}
// Setup slave address
I2caRegs.I2CSAR = msg->SlaveAddress;
// Check if bus busy
if (I2caRegs.I2CSTR.bit.BB == 1)
{
return I2C_BUS_BUSY_ERROR;
}
// Setup number of bytes to send
// MsgBuffer + Address
I2caRegs.I2CCNT = msg->NumOfBytes+2;
// Setup data to send
I2caRegs.I2CDXR = msg->MemoryHighAddr;
I2caRegs.I2CDXR = msg->MemoryLowAddr;
// for (i=0; i<msg->NumOfBytes-2; i++)
for (i=0; i<msg->NumOfBytes; i++)
{
I2caRegs.I2CDXR = *(msg->MsgBuffer+i);
}
// Send start as master transmitter
I2caRegs.I2CMDR.all = 0x6E20;
return I2C_SUCCESS;
}
有两个疑问：一是为何要先判断STP位，再判断BB位而不是只判断BB位或是顺序反过来判断？个人理解是BB位既然表示线路是否忙，那即便STP=1时，BB应该总是为1状态吧。二是为何在发送时，先往I2CDXR发送两字节地址，再接着发送四字节数据后才配置I2CMDR且同时置STT,STP和IRS。个人理解是否应先置STT位，在一个一个的发数据，若是没有先置位STT，那先前发送的六个数据（两个地址，四个数据）怎么发送FIFO也就4个容量。而且STT和STP以及IRS是同时置位的，这就不明白了，手册上讲复位时写STT,STP是无效的，那这样配置是否有效，同时置STT和STP又是什么意思。
