TI中文支持网Part Number:TMS320C6678
测试板型号：TMDXEVM6678LE
测试程序：STK-SRIO例程
一、loopmode：digital loopback
1. 当 serdes_cfg.commonSetup.inputRefClock_MHz=312.5; serdesLinkSetup.linkSpeed_GHz=5时
程序在如下三个path下
internal_path[]={SRIO_PATH_CTL_1xLaneA,SRIO_PATH_CTL_2xLaneAB,SRIO_PATH_CTL_4xLaneABCD}均可以正常运行。
2.当 serdes_cfg.commonSetup.inputRefClock_MHz=156.25; serdesLinkSetup.linkSpeed_GHz=2.5时
SRIO初始化失败，程序总是执行到 Wait_SRIO_PLL_Lock();
请问这是什么问题？对于6678EVM inputRefClock和linkSpeed是有设置限制吗？
二、loopmode：serdes loopback
DEBUG:
[C66xx_0] SRIO_SERDES_LOOPBACK test start……………………………………..
Initialize DSP main clock = 100.00MHz/1×10 = 1000MHz
Enable Exception handling…
SRIO link speed is 5.000Gbps
SRIO path configuration 1xLaneASWRITE from 0x10802200 to 0x1080a200, 8 bytes, 4259 cycles, 15 Mbps, completion code = 0
data mismatch at unit 0, 0x1 (at 0x10802200) != 0xffffffff (at 0x1080a200)
SWRITE from 0x10802200 to 0x1080a200, 16 bytes, 4187 cycles, 30 Mbps, completion code = 0
SWRITE from 0x10802200 to 0x1080a200, 32 bytes, 4371 cycles, 58 Mbps, completion code = 0
SWRITE from 0x10802200 to 0x1080a200, 64 bytes, 4580 cycles, 111 Mbps, completion code = 0
data mismatch at unit 0, 0x4 (at 0x10802200) != 0xffffffff (at 0x1080a200)
SWRITE from 0x10802200 to 0x1080a200, 128 bytes, 5094 cycles, 201 Mbps, completion code = 0
data mismatch at unit 0, 0x5 (at 0x10802200) != 0xffffffff (at 0x1080a200)
SWRITE from 0x10802200 to 0x1080a200, 256 bytes, 6092 cycles, 336 Mbps, completion code = 0
data mismatch at unit 0, 0x6 (at 0x10802200) != 0xffffffff (at 0x1080a200)
SWRITE from 0x10802200 to 0x1080a200, 512 bytes, 8286 cycles, 494 Mbps, completion code = 0
data mismatch at unit 0, 0x7 (at 0x10802200) != 0xffffffff (at 0x1080a200)
程序运行到KeyStone_SRIO_wait_LSU_completion；
请问这是什么问题？
三、loopmode：no loopback （只用了一块板子）
当serdes_cfg.commonSetup.inputRefClock_MHz=312.5; serdesLinkSetup.linkSpeed_GHz=5时，
SRIO初始化失败，程序总是执行到KeyStone_SRIO_Init；
if(srio_cfg->blockEn.bLogic_Port_EN[i])
{
while(0==(gpSRIO_regs->RIO_SP[i].RIO_SP_ERR_STAT&
CSL_SRIO_RIO_SP_ERR_STAT_PORT_OK_MASK));
}
查看寄存器值
bLogic_Port_EN[0,1]=0 bLogic_Port_EN[2,3]=1;
gpSRIO_regs->RIO_SP[2].RIO_SP_ERR_STAT=1;
这是因为我只用了一块板子的原因吗？
Shine：
1. C6678 EVM板的SRIO参考时钟是312.5MHz，所以改成156.25MHz，初始化不能通过。2. 有改动过代码吗？3. 是的，需要两块DSP板子，在KeyStone_1_SRIO_STK_User's_Guide.doc文档里有说明。SRIO_NO_LOOPBACK actually selects the test between two DSPs
,
Zahir Wang：
2.没有修改过代码，为了确认我重新导入了例程然后跑了一下还是这样。
3.请问KeyStone_1_SRIO_STK_User's_Guide.doc这个文档在哪里可以找到？
,
Shine：
在\K1_STK_v1.1\docs目录下，里面有调试步骤。
,
Zahir Wang：
我手上的例程应该是被人修改过，在官网上下载例程，程序可以正常运行。
K1_STK 地址：https://www.ti2k.com/wp-content/uploads/ti2k/DeyiSupport_DSP_faq-keystone1
