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TMS320C6748: SYS_INT_EDMA3_0_CC0_ERRINT中断问题

Part Number:TMS320C6748

大家好     使用平台TMS320C6748

发生的问题是  每次触发dma  都会进入SYS_INT_EDMA3_0_CC0_ERRINT中断   错误类型如下:

但是没有看懂是因为什么原因进入的中断

ti的工程师能够给些建议

谢谢

Nancy Wang:

请问是否有参考过EDMA配置的例程?是和哪个接口配合使用的?

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user4835762:

参考过  是edma+spi接口    现在怀疑是每次发送前都对edma进行了使能,但是发送完成后没有对edma去使能  请问是否需要这个操作

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user4835762:

想请问下,进入这个中断,代表什么错误,我现在不清楚这个错误,不清楚如何造成的这个错误

,

Nancy Wang:

请尝试写EMCR来清除EMR。

EMR/EMRH/QEMR/CCERR are read-only registers. The bits there can be set to 1 only by the EDMA hardware logic. The bits there should be cleared to 0 by user software (not EDMA HW logic), cleared to 0 by writing 1 in EMCR/EMCRH/QEMCR/CCERRCLR registers.Once a missed event is posted (by EDMA hw logic) in the event missed registers (EMR/EMRH), the bit remains set and you need to clear the set bit(s). This is done by way of CPU writes to the event missed clear registers (EMCR/EMCRH). Writing a 1 to any of the bits clears the corresponding missed event (bit) in EMR/EMRH; writing a 0 has no effect.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/339743/am335x-edma-errors

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