TDA4VM: 9G port2 SGMII in vision app-TI中文支持网

Part Number:TDA4VM

Hi,

There is a issue about vision app and I can't fix it now, please help me to analyze. The detail is following:

Code path in SDK: ti-processor-sdk-rtos-j721e-evm-08_00_00_12/vision_apps

Target: 9G port 2 SGMII can work well in vision app

Issue: 9G port 2 SGMII can't work in vision app

The code changes and test result as below:

Code changes:

The code 9G related.

port 2 work in SGMII mode, inluce functiion Board_CfgSgmii(board_serdes_cfg.c) and the other code related.

phy address and phy configuration for our hardware.

IPC

           For test 9G port 2(SGMII), I undefine the other core's IPC for test mcu 2_0 individually. The code change(app_cfg.h) is highlight:

               #define ENABLE_IPC_MPU1_0

          //#define ENABLE_IPC_MCU1_0
          //#define ENABLE_IPC_MCU1_1
          #define ENABLE_IPC_MCU2_0
          // #define ENABLE_IPC_MCU2_1
          //#define ENABLE_IPC_MCU3_0
          //#define ENABLE_IPC_MCU3_1
          // #define ENABLE_IPC_C6x_1
          // #define ENABLE_IPC_C6x_2
          // #define ENABLE_IPC_C7x_1

Test method:

      Use 1000base TI to connect PC to our hardware, and use 'ping' command to test.

Test result:

        1. 9G port 2(SGMII) works well when I use emulator to debug MCU2_0.

        2. 9G port 2(SGMII) can't work when I use SD card startup(Use command "make linux_fs_install_sd" to generate SD card in vision app ). The log is in theattachment(vision app log.txt).

        3. 9G port 2(SGMII) can't work when I load MCU2_0 in uboot.

PS: After use command "make linux_fs_install_sd" to generate SD card in vision app. I did the follow changes, 9G port 2(SGMII) can work well.

Unlink MCU2_1 in ($SD card)/rootfs/lib/firmware.

Unlink MCU2_0 from vx_app_rtos_linux_mcu2_0.out (vision app), and link it to app_remoteswitchcfg_server.xer5f(ethfw app and modified code for 9G port 2(SGMII) )

For above, I didn't get the root cause that why 9G port 2(SGMII) in vision app can't work well. Please help us to analyze.

Thanks a lot.

Regards,

Lan

Lan W：

[MCU2_0] 4.001191 s: ### CPU Frequency = 1000000000 Hz[MCU2_0] 4.001223 s: APP: Init … !!![MCU2_0] 4.001241 s: SCICLIENT: Init … !!![MCU2_0] 4.001437 s: SCICLIENT: DMSC FW version [21.1.1–v2021.01a (Terrific Lla][MCU2_0] 4.001477 s: SCICLIENT: DMSC FW revision 0x15 [MCU2_0] 4.001503 s: SCICLIENT: DMSC FW ABI revision 3.1[MCU2_0] 4.001528 s: SCICLIENT: Init … Done !!![MCU2_0] 4.001549 s: UDMA: Init … !!![MCU2_0] 4.002543 s: UDMA: Init … Done !!![MCU2_0] 4.002591 s: MEM: Init … !!![MCU2_0] 4.002623 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e1000000 of size 16777216 bytes !!![MCU2_0] 4.002674 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3600000 of size 262144 bytes !!![MCU2_0] 4.002718 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x00000000) @ d8000000 of size 16777216 bytes !!![MCU2_0] 4.002761 s: MEM: Init … Done !!![MCU2_0] 4.002781 s: IPC: Init … !!![MCU2_0] 4.002826 s: IPC: 6 CPUs participating in IPC !!![MCU2_0] 4.002862 s: IPC: Waiting for HLOS to be ready … !!![MCU2_0] 12.160217 s: IPC: HLOS is ready !!![MCU2_0] 12.165458 s: IPC: Init … Done !!![MCU2_0] 12.165506 s: APP: Syncing with 5 CPUs … !!![MCU2_0] 12.165543 s: APP: Syncing with 5 CPUs … Done !!![MCU2_0] 12.165574 s: APP: Initial app remote start!!![MCU2_0] 12.165601 s: REMOTE_SERVICE: Init … !!![MCU2_0] 12.167033 s: REMOTE_SERVICE: Init … Done !!![MCU2_0] 12.167084 s: APP: Initial app remote done!!![MCU2_0] 12.167111 s: APP: Initial ethfw start!!![MCU2_0] 12.167134 s: ETHFW: Init … !!![MCU2_0] 12.187502 s: CPSW_9G Test on MAIN NAVSS[MCU2_0] 12.199625 s: EnetPhy_setNextState: EnetPhy_setNextState -> Next state is 1.[MCU2_0] 12.199687 s: EnetPhy_setNextState: EnetPhy_setNextState -> Next state is 4.[MCU2_0] 12.199850 s: EnetPhy_bindDriver: PHY 3: OUI:000732 Model:33 Ver:00 <-> 'Rtl9010bx' : OK[MCU2_0] 12.199927 s: PHY 0 is alive[MCU2_0] 12.199960 s: PHY 1 is alive[MCU2_0] 12.199984 s: PHY 2 is alive[MCU2_0] 12.200008 s: PHY 3 is alive[MCU2_0] 12.201680 s: ETHFW: Version : 0.01.01[MCU2_0] 12.201729 s: ETHFW: Build Date: Oct 19, 2021[MCU2_0] 12.201756 s: ETHFW: Build Time: 17:56:36[MCU2_0] 12.201779 s: ETHFW: Commit SHA: 8a18cc11[MCU2_0] 12.201832 s: ETHFW: Init … DONE !!![MCU2_0] 12.201860 s: ETHFW: Remove server Init … !!![MCU2_0] 12.202610 s: Remote demo device (core : mcu2_0) …..[MCU2_0] 12.202662 s: ETHFW: Remove server Init … DONE !!![MCU2_0] 12.202694 s: APP: Initial ethfw done!!![MCU2_0] 12.203781 s: Starting lwIP, local interface IP is 192.168.1.30[MCU2_0] 12.209576 s: Host MAC address: 70:ff:76:1d:92:c2[MCU2_0] 12.262946 s: [LWIPIF_LWIP] NETIF INIT SUCCESS[MCU2_0] 12.263012 s: Added interface 'ti1', IP is 192.168.1.30[MCU2_0] 12.274247 s: EthFw: TimeSync PTP enabled[MCU2_0] 12.277730 s: Rx Flow for Software Inter-VLAN Routing is up[MCU2_0] 12.300285 s: EnetPhy_setNextState: EnetPhy_setNextState -> Next state is 2.[MCU2_0] 12.301918 s: FVID2: Init … !!![MCU2_0] 12.302012 s: FVID2: Init … Done !!![MCU2_0] 12.302052 s: DSS: Init … !!![MCU2_0] 12.302076 s: DSS: Display type is eDP !!![MCU2_0] 12.302100 s: DSS: M2M Path is enabled !!![MCU2_0] 12.302123 s: DSS: SoC init … !!![MCU2_0] 12.302144 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state=2[MCU2_0] 12.302326 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.302359 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state=2[MCU2_0] 12.302496 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.302523 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state=2[MCU2_0] 12.302628 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.302656 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=9 parent=11[MCU2_0] 12.302741 s: SCICLIENT: Sciclient_pmSetModuleClkParent success[MCU2_0] 12.302769 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=13 parent=18[MCU2_0] 12.302844 s: SCICLIENT: Sciclient_pmSetModuleClkParent success[MCU2_0] 12.302873 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 clk=1 parent=2[MCU2_0] 12.303027 s: SCICLIENT: Sciclient_pmSetModuleClkParent success[MCU2_0] 12.303071 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk=1 freq=148500000[MCU2_0] 12.304046 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success[MCU2_0] 12.304088 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk=1 state=2 flag=0[MCU2_0] 12.304205 s: SCICLIENT: Sciclient_pmModuleClkRequest success[MCU2_0] 12.304236 s: DSS: SoC init … Done !!![MCU2_0] 12.304260 s: DSS: Board init … !!![MCU2_0] 12.304281 s: DSS: Board init … Done !!![MCU2_0] 12.322592 s: DSS: Init … Done !!![MCU2_0] 12.322649 s: VHWA: VPAC Init … !!![MCU2_0] 12.322675 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state=2[MCU2_0] 12.322840 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.322872 s: VHWA: LDC Init … !!![MCU2_0] 12.326124 s: VHWA: LDC Init … Done !!![MCU2_0] 12.326172 s: VHWA: MSC Init … !!![MCU2_0] 12.335519 s: VHWA: MSC Init … Done !!![MCU2_0] 12.335573 s: VHWA: NF Init … !!![MCU2_0] 12.337218 s: VHWA: NF Init … Done !!![MCU2_0] 12.337268 s: VHWA: VISS Init … !!![MCU2_0] 12.346987 s: VHWA: VISS Init … Done !!![MCU2_0] 12.347041 s: VHWA: VPAC Init … Done !!![MCU2_0] 12.347081 s: VX_ZONE_INIT:Enabled[MCU2_0] 12.347108 s: VX_ZONE_ERROR:Enabled[MCU2_0] 12.347130 s: VX_ZONE_WARNING:Enabled[MCU2_0] 12.348235 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target IPU1-0 [MCU2_0] 12.348445 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_NF [MCU2_0] 12.348627 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_LDC1 [MCU2_0] 12.348802 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC1 [MCU2_0] 12.349107 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_MSC2 [MCU2_0] 12.349347 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target VPAC_VISS1 [MCU2_0] 12.349566 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE1 [MCU2_0] 12.349768 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE2 [MCU2_0] 12.350065 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY1 [MCU2_0] 12.350311 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DISPLAY2 [MCU2_0] 12.350504 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CSITX [MCU2_0] 12.350724 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE3 [MCU2_0] 12.351019 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE4 [MCU2_0] 12.351243 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE5 [MCU2_0] 12.351462 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE6 [MCU2_0] 12.351676 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE7 [MCU2_0] 12.351884 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target CAPTURE8 [MCU2_0] 12.352182 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M1 [MCU2_0] 12.352381 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M2 [MCU2_0] 12.352580 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M3 [MCU2_0] 12.352777 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DSS_M2M4 [MCU2_0] 12.352823 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!![MCU2_0] 12.352852 s: APP: OpenVX Target kernel init … !!![MCU2_0] 12.365755 s: APP: OpenVX Target kernel init … Done !!![MCU2_0] 12.365813 s: CSI2RX: Init … !!![MCU2_0] 12.365837 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2[MCU2_0] 12.365992 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.366038 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=2[MCU2_0] 12.366167 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.366198 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=2[MCU2_0] 12.366300 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.366327 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state=2[MCU2_0] 12.366402 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.366430 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state=2[MCU2_0] 12.366500 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.367271 s: CSI2RX: Init … Done !!![MCU2_0] 12.367320 s: CSI2TX: Init … !!![MCU2_0] 12.367347 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=2[MCU2_0] 12.367432 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.367463 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=2[MCU2_0] 12.367564 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.367591 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state=2[MCU2_0] 12.367685 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_0] 12.368285 s: CSI2TX: Init … Done !!![MCU2_0] 12.368333 s: ISS: Init … !!![MCU2_0] 12.368382 s: IssSensor_Sensor_Module_Max96715_Init init [MCU2_0] 12.368430 s: IssSensor_Sensor_Module_Max96717_Init init [MCU2_0] 12.368459 s: IssSensor_Init … Done !!![MCU2_0] 12.368554 s: vissRemoteServer_Init … Done !!![MCU2_0] 12.368622 s: IttRemoteServer_Init … Done !!![MCU2_0] 12.368655 s: UDMA Copy: Init … !!![MCU2_0] 12.370238 s: UDMA Copy: Init … Done !!![MCU2_0] 12.370339 s: APP: Init … Done !!![MCU2_0] 12.370374 s: APP: Run … !!![MCU2_0] 12.370398 s: IPC: Starting echo test …[MCU2_0] 12.372643 s: APP: Run … Done !!![MCU2_0] 12.374047 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_0] 12.374202 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 12.374279 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_0] 12.374350 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_0] 12.400052 s: EnetPhy_setNextState: EnetPhy_setNextState -> Next state is 3.[MCU2_0] 12.502706 s: RTL9010AA_VA_Initial_Configuration: PHY link state: 0[MCU2_0] 12.502760 s: RTL9010AA_VA_Initial_Configuration: PHY bmcr state: 320[MCU2_0] 12.502797 s: RTL9010AA_VA_Initial_Configuration: PHY phycr state: 0[MCU2_0] 12.503343 s: RTL9010AA_VA_Initial_Configuration: PHY link state: 0[MCU2_0] 12.503387 s: RTL9010AA_VA_Initial_Configuration: PHY bmcr state: 320[MCU2_0] 12.503422 s: RTL9010AA_VA_Initial_Configuration: PHY physr2 state: 0[MCU2_0] 12.503460 s: EnetPhy_enableState: PHY 3: falling back to manual mode[MCU2_0] 12.503495 s: EnetPhy_enableState: PHY 3: new link caps: FD1000 [MCU2_0] 12.503531 s: EnetPhy_setNextState: EnetPhy_setNextState -> Next state is 7.[MCU2_0] 12.700053 s: EnetPhy_setNextState: EnetPhy_setNextState -> Next state is 8.[MCU2_0] 12.741997 s: Function:CpswProxyServer_attachExtHandlerCb,HostId:0,CpswType:6[MCU2_1] 4.239189 s: CIO: Init … Done !!![MCU2_1] 4.239241 s: ### CPU Frequency = 1000000000 Hz[MCU2_1] 4.239272 s: APP: Init … !!![MCU2_1] 4.239291 s: SCICLIENT: Init … !!![MCU2_1] 4.239497 s: SCICLIENT: DMSC FW version [21.1.1–v2021.01a (Terrific Lla][MCU2_1] 4.239535 s: SCICLIENT: DMSC FW revision 0x15 [MCU2_1] 4.239562 s: SCICLIENT: DMSC FW ABI revision 3.1[MCU2_1] 4.239589 s: SCICLIENT: Init … Done !!![MCU2_1] 4.239612 s: UDMA: Init … !!![MCU2_1] 4.240654 s: UDMA: Init … Done !!![MCU2_1] 4.240699 s: MEM: Init … !!![MCU2_1] 4.240734 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e2000000 of size 16777216 bytes !!![MCU2_1] 4.240786 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3640000 of size 262144 bytes !!![MCU2_1] 4.240842 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x00000000) @ d9000000 of size 117440512 bytes !!![MCU2_1] 4.240887 s: MEM: Init … Done !!![MCU2_1] 4.240910 s: IPC: Init … !!![MCU2_1] 4.240957 s: IPC: 6 CPUs participating in IPC !!![MCU2_1] 4.240992 s: IPC: Waiting for HLOS to be ready … !!![MCU2_1] 11.952997 s: IPC: HLOS is ready !!![MCU2_1] 11.958220 s: IPC: Init … Done !!![MCU2_1] 11.958277 s: APP: Syncing with 5 CPUs … !!![MCU2_1] 12.165543 s: APP: Syncing with 5 CPUs … Done !!![MCU2_1] 12.165583 s: APP: Initial app remote start!!![MCU2_1] 12.165703 s: REMOTE_SERVICE: Init … !!![MCU2_1] 12.167040 s: REMOTE_SERVICE: Init … Done !!![MCU2_1] 12.167085 s: APP: Initial app remote done!!![MCU2_1] 12.167114 s: FVID2: Init … !!![MCU2_1] 12.167172 s: FVID2: Init … Done !!![MCU2_1] 12.167197 s: VHWA: DMPAC: Init … !!![MCU2_1] 12.167219 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=2[MCU2_1] 12.167355 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_1] 12.167395 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state=2[MCU2_1] 12.167519 s: SCICLIENT: Sciclient_pmSetModuleState success[MCU2_1] 12.167549 s: VHWA: DOF Init … !!![MCU2_1] 12.175564 s: VHWA: DOF Init … Done !!![MCU2_1] 12.175618 s: VHWA: SDE Init … !!![MCU2_1] 12.177900 s: VHWA: SDE Init … Done !!![MCU2_1] 12.177943 s: VHWA: DMPAC: Init … Done !!![MCU2_1] 12.177983 s: VX_ZONE_INIT:Enabled[MCU2_1] 12.178010 s: VX_ZONE_ERROR:Enabled[MCU2_1] 12.178032 s: VX_ZONE_WARNING:Enabled[MCU2_1] 12.178959 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_SDE [MCU2_1] 12.179137 s: VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added target DMPAC_DOF [MCU2_1] 12.179190 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!![MCU2_1] 12.179219 s: APP: OpenVX Target kernel init … !!![MCU2_1] 12.179441 s: APP: OpenVX Target kernel init … Done !!![MCU2_1] 12.179478 s: UDMA Copy: Init … !!![MCU2_1] 12.181031 s: UDMA Copy: Init … Done !!![MCU2_1] 12.181086 s: APP: Init … Done !!![MCU2_1] 12.181113 s: APP: Run … !!![MCU2_1] 12.181137 s: IPC: Starting echo test …[MCU2_1] 12.183036 s: APP: Run … Done !!![MCU2_1] 12.183968 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[.] C7X_1[.] [MCU2_1] 12.184071 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[.] [MCU2_1] 12.184148 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [MCU2_1] 12.373790 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] C66X_1[P] C66X_2[P] C7X_1[P] [C6x_1 ] 4.329322 s: CIO: Init … Done !!![C6x_1 ] 4.329347 s: ### CPU Frequency = 1350000000 Hz[C6x_1 ] 4.329358 s: APP: Init … !!![C6x_1 ] 4.329367 s: SCICLIENT: Init … !!![C6x_1 ] 4.329562 s: SCICLIENT: DMSC FW version [21.1.1–v2021.01a (Terrific Lla][C6x_1 ] 4.329577 s: SCICLIENT: DMSC FW revision 0x15 [C6x_1 ] 4.329587 s: SCICLIENT: DMSC FW ABI revision 3.1[C6x_1 ] 4.329598 s: SCICLIENT: Init … Done !!![C6x_1 ] 4.329608 s: UDMA: Init … !!![C6x_1 ] 4.330797 s: UDMA: Init … Done !!![C6x_1 ] 4.330819 s: MEM: Init … !!![C6x_1 ] 4.330830 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e4000000 of size 16777216 bytes !!![C6x_1 ] 4.330847 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!![C6x_1 ] 4.330862 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e5000000 of size 50331648 bytes !!![C6x_1 ] 4.330877 s: MEM: Init … Done !!![C6x_1 ] 4.330885 s: IPC: Init … !!![C6x_1 ] 4.330903 s: IPC: 6 CPUs participating in IPC !!![C6x_1 ] 4.330917 s: IPC: Waiting for HLOS to be ready … !!![C6x_1 ] 10.636604 s: IPC: HLOS is ready !!![C6x_1 ] 10.640089 s: IPC: Init … Done !!![C6x_1 ] 10.640116 s: APP: Syncing with 5 CPUs … !!![C6x_1 ] 12.165543 s: APP: Syncing with 5 CPUs … Done !!![C6x_1 ] 12.165563 s: APP: Initial app remote start!!![C6x_1 ] 12.165574 s: REMOTE_SERVICE: Init … !!![C6x_1 ] 12.166330 s: REMOTE_SERVICE: Init … Done !!![C6x_1 ] 12.166366 s: APP: Initial app remote done!!![C6x_1 ] 12.166384 s: VX_ZONE_INIT:Enabled[C6x_1 ] 12.166399 s: VX_ZONE_ERROR:Enabled[C6x_1 ] 12.166409 s: VX_ZONE_WARNING:Enabled[C6x_1 ] 12.167268 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!![C6x_1 ] 12.167285 s: APP: OpenVX Target kernel init … !!![C6x_1 ] 12.167570 s: APP: OpenVX Target kernel init … Done !!![C6x_1 ] 12.167597 s: UDMA Copy: Init … !!![C6x_1 ] 12.170899 s: UDMA Copy: Init … Done !!![C6x_1 ] 12.170919 s: APP: Init … Done !!![C6x_1 ] 12.171618 s: APP: Run … !!![C6x_1 ] 12.171630 s: IPC: Starting echo test …[C6x_1 ] 12.172782 s: APP: Run … Done !!![C6x_1 ] 12.173116 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[x] C7X_1[P] [C6x_1 ] 12.173365 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 12.183737 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_1 ] 12.373696 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[s] C66X_2[P] C7X_1[P] [C6x_2 ] 4.418318 s: CIO: Init … Done !!![C6x_2 ] 4.418353 s: ### CPU Frequency = 1350000000 Hz[C6x_2 ] 4.418365 s: APP: Init … !!![C6x_2 ] 4.418375 s: SCICLIENT: Init … !!![C6x_2 ] 4.418563 s: SCICLIENT: DMSC FW version [21.1.1–v2021.01a (Terrific Lla][C6x_2 ] 4.418577 s: SCICLIENT: DMSC FW revision 0x15 [C6x_2 ] 4.418587 s: SCICLIENT: DMSC FW ABI revision 3.1[C6x_2 ] 4.418597 s: SCICLIENT: Init … Done !!![C6x_2 ] 4.418607 s: UDMA: Init … !!![C6x_2 ] 4.419805 s: UDMA: Init … Done !!![C6x_2 ] 4.419829 s: MEM: Init … !!![C6x_2 ] 4.419842 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ e8000000 of size 16777216 bytes !!![C6x_2 ] 4.419860 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 800000 of size 229376 bytes !!![C6x_2 ] 4.419876 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ e9000000 of size 50331648 bytes !!![C6x_2 ] 4.419893 s: MEM: Init … Done !!![C6x_2 ] 4.419902 s: IPC: Init … !!![C6x_2 ] 4.419923 s: IPC: 6 CPUs participating in IPC !!![C6x_2 ] 4.419936 s: IPC: Waiting for HLOS to be ready … !!![C6x_2 ] 10.666457 s: IPC: HLOS is ready !!![C6x_2 ] 10.669939 s: IPC: Init … Done !!![C6x_2 ] 10.669973 s: APP: Syncing with 5 CPUs … !!![C6x_2 ] 12.165542 s: APP: Syncing with 5 CPUs … Done !!![C6x_2 ] 12.165559 s: APP: Initial app remote start!!![C6x_2 ] 12.165570 s: REMOTE_SERVICE: Init … !!![C6x_2 ] 12.166333 s: REMOTE_SERVICE: Init … Done !!![C6x_2 ] 12.166368 s: APP: Initial app remote done!!![C6x_2 ] 12.166387 s: VX_ZONE_INIT:Enabled[C6x_2 ] 12.166399 s: VX_ZONE_ERROR:Enabled[C6x_2 ] 12.166409 s: VX_ZONE_WARNING:Enabled[C6x_2 ] 12.167270 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!![C6x_2 ] 12.167290 s: APP: OpenVX Target kernel init … !!![C6x_2 ] 12.167593 s: APP: OpenVX Target kernel init … Done !!![C6x_2 ] 12.167620 s: UDMA Copy: Init … !!![C6x_2 ] 12.171019 s: UDMA Copy: Init … Done !!![C6x_2 ] 12.171040 s: APP: Init … Done !!![C6x_2 ] 12.171720 s: APP: Run … !!![C6x_2 ] 12.171732 s: IPC: Starting echo test …[C6x_2 ] 12.173000 s: APP: Run … Done !!![C6x_2 ] 12.173296 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[.] C66X_2[s] C7X_1[P] [C6x_2 ] 12.173354 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 12.183753 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C6x_2 ] 12.373706 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P] C66X_2[s] C7X_1[P] [C7x_1 ] 4.627503 s: CIO: Init … Done !!! [C7x_1 ] 4.627517 s: ### CPU Frequency = 1000000000 Hz [C7x_1 ] 4.627528 s: APP: Init … !!! [C7x_1 ] 4.627536 s: SCICLIENT: Init … !!![C7x_1 ] 4.627708 s: SCICLIENT: DMSC FW version [21.1.1–v2021.01a (Terrific Lla][C7x_1 ] 4.627722 s: SCICLIENT: DMSC FW revision 0x15 [C7x_1 ] 4.627732 s: SCICLIENT: DMSC FW ABI revision 3.1[C7x_1 ] 4.627743 s: SCICLIENT: Init … Done !!![C7x_1 ] 4.627752 s: UDMA: Init … !!![C7x_1 ] 4.628610 s: UDMA: Init … Done !!![C7x_1 ] 4.628621 s: MEM: Init … !!![C7x_1 ] 4.628631 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000004) @ 100000000 of size 268435456 bytes !!![C7x_1 ] 4.628652 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 70020000 of size 8159232 bytes !!![C7x_1 ] 4.628670 s: MEM: Created heap (L2_MEM, id=2, flags=0x00000001) @ 64800000 of size 491520 bytes !!![C7x_1 ] 4.628687 s: MEM: Created heap (L1_MEM, id=3, flags=0x00000001) @ 64e00000 of size 16384 bytes !!![C7x_1 ] 4.628704 s: MEM: Created heap (DDR_SCRATCH_MEM, id=4, flags=0x00000001) @ ec000000 of size 268435456 bytes !!![C7x_1 ] 4.628721 s: MEM: Init … Done !!![C7x_1 ] 4.628729 s: IPC: Init … !!![C7x_1 ] 4.628743 s: IPC: 6 CPUs participating in IPC !!![C7x_1 ] 4.628756 s: IPC: Waiting for HLOS to be ready … !!![C7x_1 ] 10.784937 s: IPC: HLOS is ready !!![C7x_1 ] 10.786871 s: IPC: Init … Done !!![C7x_1 ] 10.786886 s: APP: Syncing with 5 CPUs … !!![C7x_1 ] 12.165543 s: APP: Syncing with 5 CPUs … Done !!![C7x_1 ] 12.165563 s: APP: Initial app remote start!!![C7x_1 ] 12.165572 s: REMOTE_SERVICE: Init … !!![C7x_1 ] 12.165935 s: REMOTE_SERVICE: Init … Done !!![C7x_1 ] 12.165955 s: APP: Initial app remote done!!![C7x_1 ] 12.165970 s: VX_ZONE_INIT:Enabled[C7x_1 ] 12.165982 s: VX_ZONE_ERROR:Enabled[C7x_1 ] 12.165992 s: VX_ZONE_WARNING:Enabled[C7x_1 ] 12.166256 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!![C7x_1 ] 12.166271 s: APP: OpenVX Target kernel init … !!![C7x_1 ] 12.166361 s: APP: OpenVX Target kernel init … Done !!![C7x_1 ] 12.166377 s: APP: Init … Done !!![C7x_1 ] 12.166388 s: APP: Run … !!![C7x_1 ] 12.166404 s: IPC: Starting echo test …[C7x_1 ] 12.166915 s: APP: Run … Done !!![C7x_1 ] 12.173120 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[x] C7X_1[s] [C7x_1 ] 12.173355 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 12.183773 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] C66X_1[P] C66X_2[P] C7X_1[s] [C7x_1 ] 12.373737 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[P] C66X_1[P

,

Cherry Zhou：

Hi we have received your questions and feedback, if there is any updates I will reach to you as soon as possible. Thanks!

,

Lan W：

Thanks a lot. Looking forward to your reply.

,

Cherry Zhou：

Sorry for the delay.

Lan W 说：Unlink MCU2_0 from vx_app_rtos_linux_mcu2_0.out (vision app), and link it to app_remoteswitchcfg_server.xer5f(ethfw app and modified code for 9G port 2(SGMII) )

EthFW won't work with Vision Apps, you need to compile the MCU 2_0 app which has EthFW integrated and then link that.

Lan W：

Cherry Zhou：

Lan W：

Cherry Zhou：

TDA4VM: 9G port2 SGMII in vision app

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