AM5728: AM5728: Linux/AM5728: GPMC can not write fpga data on high address

Dears,

We use gpmc interface to connect to fpga( use addr/data mux mode, and async read/write ),  on am4378 ,we read/write data both ok, now we should change to am5728 platfrom,  then porting the gpmc config from am437x to am5728(and changed some time sequence),   now, i can read and write data ok on address from 0~ 0x50000 ,but  from address 0x50000 , I can not write data success,  it seems that i can not operate the high address from 0x50000 to other.  please help to check this issue, thanks so much.

read 0x400044 test

# cat dump_motor3_reg | grep 0x40044
reg0x40044 :0x0

//write  0x400044 address as 0xf3 data

# echo 0x40044 0xf3 > fpga_reg

//read again, and can write 0xf3 success.
# cat dump_motor3_reg | grep 0x40044
reg0x40044 :0xf3

now test 0x5300a :

//read 0x5300a address:
# cat dump_motor1_reg | grep 5300areg0x5300a :0x0

//write 0x5300a as 0xf3 data:
# echo 0x5300a 0xf3 > fpga_reg

//read back, also data is 0, not write success.
# cat dump_motor1_reg | grep 5300areg0x5300a :0x0

but on am4378 platform , there is no this issue, every address can operat success.

the u-boot gpmc pin config below:

we use ad[0-15] a[1]-a[6] ,   16 + 6 = 22 => 4M space

const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {
{GPMC_AD0, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD1, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD2, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD3, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD4, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD5, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD6, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD7, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD8, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD9, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD10, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD11, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD12, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD13, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD14, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_AD15, (M0 | PIN_INPUT_PULLUP)}, /* gpmc_a0.vin4b_d0 */
{GPMC_A1, (M0 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a1.vin4b_d1 */
{GPMC_A2, (M0 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a2.vin4b_d2 */
{GPMC_A3, (M0 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a3.vin4b_d3 */
{GPMC_A4, (M0 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a4.vin4b_d4 */
{GPMC_A5, (M0 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a5.vin4b_d5 */
{GPMC_A6, (M0 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a6.vin4b_d6 */
{GPMC_CLK, (M0 | PIN_OUTPUT)}, /* gpmc_a6.vin4b_d6 */
{GPMC_CS0, (M0 | PIN_OUTPUT)}, /* gpmc_a6.vin4b_d6 */
{GPMC_ADVN_ALE, (M0 | PIN_OUTPUT_PULLUP)}, /* gpmc_a6.vin4b_d6 */
{GPMC_OEN_REN, (M0 | PIN_OUTPUT_PULLUP)}, /* gpmc_a6.vin4b_d6 */
{GPMC_WEN, (M0 | PIN_OUTPUT_PULLUP)}, /* gpmc_a6.vin4b_d6 */

…

}

kernel dts config:
&gpmc {
status = "okay";

ranges = <0 0 0x04000000 0x06000000>; /* mayi fpga on CS0 space. Min partition = 128MB */
fpga@0,0 {
compatible = "mayi,gpmc-fpga";
reg = <0 0 0x04000000>; bank-width = <2>;
gpmc,mux-add-data = <2>; //mux addr;

gpmc,rd-cycle-ns = <70>;
gpmc,access-ns = <60>;
gpmc,cs-on-ns = <0>; //4
gpmc,cs-rd-off-ns = <68>;
gpmc,adv-on-ns = <0>; //8
gpmc,adv-rd-off-ns = <23>;

gpmc,oe-on-ns = <26>;
gpmc,oe-off-ns = <64>;

gpmc,wr-cycle-ns = <60>;
gpmc,wr-access-ns = <60>; //?
gpmc,wr-data-mux-bus-ns = <26>;

gpmc,cs-wr-off-ns = <68>;
gpmc,adv-wr-off-ns = <23>;
gpmc,we-on-ns = <24>;
gpmc,we-off-ns = <64>;
//gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <10>;
gpmc,cycle2cycle-samecsen = <10>;
gpmc,cycle2cycle-diffcsen = <0>;

gpmc,page-burst-access-ns = <10>;
#address-cells = <1>;
#size-cells = <1>;
};
};

Shine：

请问有量过时序吗？和AM4378比对一下，有什么不一样。

,

ping wang：

你好，

由于5728 手册上 gpmc 的 pin复用上说 再mux模式下 A0-not used， 所以没有配 gpmc_a[0]引脚，而且我们的gpmc_a0引脚也没有接，但是我尝试再uboot下配置了下gpmc_a0：  {GPMC_A0, (M0 | PIN_OUTPUT_PULLDOWN)}，现在就可以访问0x7xxxx, 0x8xxxx,0x9xxxx等地址， 但是0x5xxxx的地址还是写不正确。

我们使用的是异步模式，我看了下4378的gpmc时钟gpmc_fclk时钟是100Mhz的, 而5728 fclk是266M，所以时序是参考修改了的

参考spruhz6l.pdf( AM572xSitara ProcessorsSilicon Revision 2.0, 1.1Texas Instruments Sitara Family of ProductsTechnical Reference Manual ) 文档的如下时序修改了下5728的时序：

gpmc,mux-add-data = <2>; //mux addr;

gpmc,rd-cycle-ns = <70>; gpmc,access-ns = <60>; gpmc,cs-on-ns = <0>; //4 gpmc,cs-rd-off-ns = <68>; gpmc,adv-on-ns = <0>; //8 gpmc,adv-rd-off-ns = <23>;

gpmc,oe-on-ns = <26>; gpmc,oe-off-ns = <64>;

gpmc,wr-cycle-ns = <60>; gpmc,wr-access-ns = <60>; //? gpmc,wr-data-mux-bus-ns = <26>;

gpmc,cs-wr-off-ns = <68>; gpmc,adv-wr-off-ns = <23>; gpmc,we-on-ns = <24>; gpmc,we-off-ns = <64>; //gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <10>; gpmc,cycle2cycle-samecsen = <10>; gpmc,cycle2cycle-diffcsen = <0>;

gpmc,page-burst-access-ns = <10>;

但是地位地址0x1xxxx, 0x3xxxx等都能正确读写，0x5xxxx就不能正确读写。麻烦帮忙看下时序是否配置正确呢？如果可以优化下，能否帮忙优化下呢，十分感谢。

 

,

Shine：

建议用示波器量时序，主要看一下地址线上是否发出了地址，数据上是否有正确的数据输出，以及读写信号是否正确，如果DSP这边发出的时序没有问题，而FPGA那边没有收到，那就要检查FPGA的接收时序，需要DSP的时序和FPGA的时序匹配。