TI中文支持网Part Number:TMS320C6678Other Parts Discussed in Thread:CDCM6208, CDCE62005
按照文件“Hardware design guide for KeyStone I devices”，选择CDCM6208给DSP提供时钟，DSP没有协处理器辅助。
根据CDCM6208的手册，可以使用同一电源对CDCM6208的输出时钟buffer的和DSP输入时钟buffer供电，保证了只有DSP的时钟输入不早于其电源。具体描述如下（拟采用标红的方式2）。
DSPs are sensitive to any kind of voltage swing on unpowered input rails. To protect the DSP from long-term
reliability problems, TI recommends avoiding any clock signal to the DSP until the DSP power rail is also
powered up. This can be achieved in two ways using the CDCM6208:
1. Digital control: Initiating a configuration of all registers so that all outputs are disabled, and then turning on
outputs one by one through serial interface after each DSP rail becomes powered up accordingly.
2. Output Power supply domain control: An even easier scheme might be to connect the clock output power
supply VDD_Yx to the corresponding DSP input clock supply domain. In this case, the CDCM6208 output will
remain disabled until the DSP rails ramps up as well. Figure 58 shows the turnon behavior.
但是DSP的输入时钟buffer是CVDD。“ The clock input buffers for CORECLK, DDRCLK, PASSCLK, SRIOSGMIICLK, PCIECLK and MCMCLK
use CVDD as a supply voltage” 见6678产品手册第7.3.1节。CDCM6208相关的电源的范围为1.8-3.3V，CVDD无法满足要求，是否无法采用方式2，只能考虑方式1？
另外，我看到官方开发板，使用的时钟芯片是CDCE62005, 我没有使用CDCE62005，一是因为这个芯片输出时钟是5个，可能比较少。第二是担心CDCE62005在上电以后只有对芯片发送命令才能输出时钟。我没有协处理器，就办不到。而CDCM6208有预设置的时钟输出。选择CDCM6208是否正确？
Shine：
抱歉，我对CDCM6208芯片不熟，DSP这边的时钟输入电平是要求1.8v，看CDCM6208供电是否能是1.8v。如果不满足的话，看方法二是否能通过加电平转换器解决，具体还是要去时钟论坛咨询。
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Maverick_1984：
"DSP这边的时钟输入电平是要求1.8v"与以下描述矛盾
The clock input buffers for CORECLK, DDRCLK, PASSCLK, SRIOSGMIICLK, PCIECLK and MCMCLK use CVDD as a supply voltage” 见6678产品手册第7.3.1节。
如何理解
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Shine：
抱歉，看错了，那不能直接连接了。
