【求助】CCS5.2 编译28069问题-TI中文支持网

使用CCS5.2调试F28069，Flash模式，代码编译正常，点debug后进入仿真模式，下载完程序之后每次都弹出一个窗口提示No source available for "main() at 0x3f58e2" ，程序指针（绿箭头）也没有指到main函数的第一行，根本就没有那个绿箭头。点单步没反应，我的main函数第一句调用了一个Init（）函数，点单步的时候会提示No source available for "Init() at 0x3fXXXX" 。总之一句话，无法单步调试，也无法设置断点，使用ESTOP0也不管用，但是全速执行正常。我想应该是工程中某些设置有问题吧，因为我用例程里面的工程调试是正常的，应该与硬件无关。CMD文件我改过了，不改不能用，这个不会有关系吧？有遇到过这个问题的出来给解释一下呗

Young Hu：

相应的库添加了没有？

user1988539：

回复 Young Hu:

相应的库文件都有那些呢？库文件没有的话应该编译时就出错吧？我觉得现在的现象好像是下载完代码后没有执行到main函数部分，而在相应的设置我已经设置了复位和load完成后自己执行到main函数！

Eric Ma：

回复 user1988539:

SHUAIHU，

我觉得你应该把你改过的cmd文件贴上来，让我们检查一下。你程序烧写情况也正常吗？

另外，你可以到TI官网下载controlSUITE软件，在该软件安装目录下C:\ti\controlSUITE\device_support\f2806x\v135\F2806x_examples\flash_f28069，有flash_f28069例程，这个例程就是跑在flash上的，cmd也不用你修改，可以在上面添加你自己的代码。

关于调试的话，只要注意一点，点复位按钮后，要选择一下scripts菜单，让28069 boot to flash。

Eric

user1988539：

回复 Eric Ma:

MEMORY{PAGE 0 : /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ RAML0_L3 : origin = 0x008000, length = 0x002000 /* on-chip RAM block L0 */ // RAML1 : origin = 0x008800, length = 0x000400 /* on-chip RAM block L1 *///JSH 2013年2月19日15:50:19 OTP : origin = 0x3D7800, length = 0x000400 /* on-chip OTP */

//FLASHH : origin = 0x3D8000, length = 0x004000 /* on-chip FLASH */JSH 2013年2月17日8:52:05 //FLASHG : origin = 0x3DC000, length = 0x004000 /* on-chip FLASH */JSH 2013年2月17日8:52:05 //FLASHF : origin = 0x3E0000, length = 0x004000 /* on-chip FLASH */JSH 2013年2月17日8:52:05 FLASHFGH : origin = 0x3D8000, length = 0x00C000 /* on-chip FLASH *///JSH 2013年2月17日8:52:05 // FLASHE : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH */JSH 2013年2月17日8:52:05 // FLASHD : origin = 0x3E8000, length = 0x004000 /* on-chip FLASH */JSH 2013年2月17日8:52:05 // FLASHC : origin = 0x3EC000, length = 0x004000 /* on-chip FLASH */JSH 2013年2月17日8:52:05 // FLASHA : origin = 0x3F4000, length = 0x003F80 /* on-chip FLASH */JSH 2013年2月17日8:52:05 FLASHABCD : origin = 0x3E8000, length = 0x00FF80 CSM_RSVD : origin = 0x3F7F80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x3F7FF6, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ CSM_PWL_P0 : origin = 0x3F7FF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */

FPUTABLES : origin = 0x3FD860, length = 0x0006A0 /* FPU Tables in Boot ROM */ IQTABLES : origin = 0x3FDF00, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FEA50, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FEADC, length = 0x0000AA /* IQ Math Tables in Boot ROM */

ROM : origin = 0x3FF3B0, length = 0x000C10 /* Boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */

PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */

BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ //RAML2 : origin = 0x008C00, length = 0x000400 /* on-chip RAM block L2 */ //RAML3 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L3 */ RAML4 : origin = 0x00A000, length = 0x002000 /* on-chip RAM block L4 */ RAML5 : origin = 0x00C000, length = 0x002000 /* on-chip RAM block L5 */ RAML6 : origin = 0x00E000, length = 0x002000 /* on-chip RAM block L6 */ RAML7 : origin = 0x010000, length = 0x002000 /* on-chip RAM block L7 */ RAML8 : origin = 0x012000, length = 0x002000 /* on-chip RAM block L8 */ USB_RAM : origin = 0x040000, length = 0x000800 /* USB RAM */ FLASHE : origin = 0x3E4000, length = 0x004000 /* on-chip FLASH */}

/* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM*/

SECTIONS{

/* Allocate program areas: */ .cinit : > FLASHABCD, PAGE = 0 .pinit : > FLASHABCD, PAGE = 0 .text : > FLASHABCD, PAGE = 0 codestart : > BEGIN, PAGE = 0 ramfuncs : LOAD = FLASHFGH, RUN = RAML0_L3, LOAD_START(_RamfuncsLoadStart), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), LOAD_SIZE(_RamfuncsLoadSize), PAGE = 0

csmpasswds : > CSM_PWL_P0, PAGE = 0 csm_rsvd : > CSM_RSVD, PAGE = 0

/* Allocate uninitalized data sections: */ .stack : > RAMM0, PAGE = 1 //.ebss : > RAML2, PAGE = 1 JSH 2013年2月17日8:52:05 .ebss : > RAML4, PAGE = 1//JSH 2013年2月17日8:52:05 //.esysmem : > RAML2, PAGE = 1 .esysmem : > RAML4, PAGE = 1//JSH 2013年2月20日14:13:36

/* Initalized sections to go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHABCD, PAGE = 0 .switch : > FLASHABCD, PAGE = 0

/* Allocate IQ math areas: */ IQmath : > FLASHABCD, PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Allocate FPU math areas: */ FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD GLOVARRAM : > RAML5, PAGE = 1 DMARAML6 : > RAML6, PAGE = 1 DMARAML7 : > RAML7, PAGE = 1 DMARAML8 : > RAML8, PAGE = 1

FFTipcb ALIGN(256) : {} > RAML4 PAGE = 1 /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD {

IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)

} */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD {

IQmath.lib<IQNasinTable.obj> (IQmathTablesRam)

} */

/* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. /* /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS, PAGE = 0, TYPE = DSECT

}

controlSUITE 的例程正常，由于代码比较大，CMD文件做了修改，例程中的cmd文件是默认的吧？好像不太合适。烧些FLASH应该是正常的，因为烧写完毕后重新上电可以正常运行（运行了液晶和通讯两个主要程序，均正常）。选择 boot to flash后还是不行，提示execution state prevented access at *(0xD00)=0x55AA [f28069.gel:687] at EMU_BOOT_FLASH()

在C文件里就没有程序的指针，debug烧写完程序后会提示No source available for "main() at 0x3f5113"

【求助】CCS5.2 编译28069问题

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