Other Parts Discussed in Thread:HALCOGEN, TMS570LS1114
Dear:
在使用TMS570的CAN功能时,配饰IF1为数据发送,IF2为数据接收,IF3监控数据;就是在接收时,我的IF2数据更新了,但是我的IF3监控的数据一直未发生变更,不清楚是什么问题?能否给下有TMS570的相关例程文件吗?想参考一下。
Susan Yang:
TMS570LS1114 CAN例程的话,您可以在安装HALCoGen之后,在下面的路径找到
\HALCoGen\v04.07.01\examples\TMS570LS12x_11x
另外若是可以的话,能否说明下您的工程或者给出相关的代码?
,
Cooper Zhang1:
您好:还请帮忙检查看下是否哪里有问题?为什么IF3的数据不能和IF2同步?他监控的是哪里数据?
#include "all_header.h"
#include "system.h"
#include "emif.h"
#include "errata_SSWF021_45.h"
#include "etpwm.h"
#include "sys_dma.h"#include "reg_etpwm.h"
#include <stdio.h>
#include <string.h>static uint32_t Received_ID ; /*SD_20210119*/
static uint32 DMA_Comp_Flag;
g_dmaCTRL g_dmaCTRLPKT; /*dma control packet configuration stack*/
#define D_COUNT8
#define D_SIZE8int data;
uint32 cnt = 0;
uint32 error = 0;
uint32 tx_done = 0;
uint32 CpuCount = 0;
uint32 timer0 = 0;uint8_t tx_data1[D_COUNT] = {1, 2, 3, 4, 4, 3, 2, 1};/*transmit buffer in sys ram*/
uint8_t tx_data2[D_COUNT] = {1, 3, 5, 7, 9, 11, 13, 15};
uint8_t tx_data3[D_COUNT] = {2, 4, 6, 8, 10, 12, 14, 16};uint8_t rx_data[D_COUNT] = {0};
uint8_t rx_data1[D_COUNT] = {0};/*receive buffer in sys ram*/
uint8_t rx_data2[D_COUNT] = {0};
uint8_t rx_data3[D_COUNT] = {0};void delay(uint32 time);
void dmaConfigCtrlRxPacket(uint32 sadd,uint32 dadd,uint32 dsize);
uint32 checkPackets(uint8 *src_packet,uint8 *dst_packet,uint32 psize);void dmaGroupANotification(dmaInterrupt_t inttype, uint32 channel)
{DMA_Comp_Flag = 0x5555AAAA;
}void delay(uint32 time)
{int i;
for(i = 0; i < time; i++);
}
void main(void)
{_enable_interrupt_();/*Enable IRQ interrupt in ARM CPSR register*/DMA_Comp_Flag = 0xAAAA5555;/* Reset the Flag */
rtiInit();rtiEnableNotification(rtiNOTIFICATION_COMPARE0);
//rtiDisableNotification(rtiNOTIFICATION_COMPARE0);_enable_IRQ();rtiStartCounter(rtiCOUNTER_BLOCK0);
u8gv_tmr_addr = get_tmr_addr();canInit();/* initialize can*/vimInit();
canREG1->CTL |= (uint32)(1<<18);/*enable DMA DE1 for IF1*/canREG1->CTL |= (uint32)(1<<19);/*enable DMA DE2 for IF2*/canREG1->CTL |= (uint32)(1<<20);/*Enable DE3 bit in CTL register to trigger DMA when IF3 receives data*/canREG1->IF3OBS = 0x0000001AU;/* Read ARB, DATA A & B – 8 bytes */canREG1->IF3UEy[0] = 0x0000002AU;/*Message box of RX 2,4,6 configured for auto update*//* – DMA Configuration */dmaEnable();/* Enable DMA */
//dmaEnableInterrupt(DMA_CH16, FTC);/*Enable Interrupt after reception of data*/dmaEnableInterrupt(DMA_CH0, FTC);//dmaReqAssign(DMA_CH2,17);/*DMA Configuration and Enable DMA:DCAN1 IF1对应DMAREQ[17]*/
//dmaReqAssign(DMA_CH1,6);/*DCAN1 IF2对应DMAREQ[6]*/dmaReqAssign(DMA_CH0,16);/*DCAN1 IF3对应请求线DMAREQ[16]*/
//canEnableloopback(canREG1, Internal_Lbk);
/* – Populate dma control packets structure *//* Source Address = IF3 Data register* Destination= Receive Buffer in Sys RAM* Length = 1 ( 64bits = 8 * 8 Bytes)*/
// dmaConfigCtrlRxPacket((uint32)(&tx_data2), (uint32)(&(canREG1->IF1DATx[0])), 1);dmaConfigCtrlRxPacket((uint32)(&(canREG1->IF3DATx[0])),(uint32)(&rx_data2),1);
//dmaConfigCtrlRxPacket((uint32)(&rx_data2),(uint32)(&(canREG1->IF2DATx[0])),1);
dmaSetCtrlPacket(DMA_CH0, g_dmaCTRLPKT); /*setting dma control packets for transmit*/
// dmaSetCtrlPacket(DMA_CH1, g_dmaCTRLPKT);
// dmaSetCtrlPacket(DMA_CH2, g_dmaCTRLPKT);
dmaSetChEnable(DMA_CH0, DMA_SW);/*CH0使能,IF1填充数据*/
// dmaSetChEnable(DMA_CH1, DMA_SW);#if 1while(1){//printf("CAN TX\n");delay(100000);
DMA_Comp_Flag = 0xAAAA5555;/* Reset the Flag */
canTransmit(canREG1, canMESSAGE_BOX3, (const uint8 *)&tx_data2[0]);/* transmit on can1 */
//canIsTxMessagePending(canREG1, canMESSAGE_BOX3);CpuCount = canIsTxMessagePending(canREG1, canMESSAGE_BOX3);//can1LowLevelInterrupt();
//can1HighLevelInterrupt();
while(!canIsRxMessageArrived(canREG1, canMESSAGE_BOX4));dmaFTCAInterrupt();while(DMA_Comp_Flag != 0x5555AAAA);/* Wait for the DMA interrupt ISR to set the Flag */canGetData(canREG1, canMESSAGE_BOX4, (uint8 *)&rx_data[0]);/* receive on can1 */Received_ID = (canREG1->IF3ARB & 0x1FFC0000)>>18;
}
#endif
return 0;
}void canMessageNotification(canBASE_t *node, uint32_t messageBox)
{
while(!canIsRxMessageArrived(canREG1, canMESSAGE_BOX4));
canGetData(canREG1, canMESSAGE_BOX4, (uint8 *)&rx_data[0]);Received_ID = (canREG1->IF3ARB & 0x1FFC0000)>>18;
/*switch(rx_data[0]){case 13:data = (rx_data[1] – 0x30) * 1000 + (rx_data[2] – 0x30) * 100 + (rx_data[3] -0x30) * 10 + rx_data[4] – 0x30;data *= 1.25;break;default:break;}
etpwmREG1->CMPA = data;
memset(rx_data, 0, sizeof(rx_data));data = 0;*/
}#pragma WEAK(rtiNotification)
void rtiNotification(uint32 notification)
{/* Reset the Flag */timer0 ++;
}void dmaConfigCtrlRxPacket(uint32 sadd,uint32 dadd,uint32 dsize)
{g_dmaCTRLPKT.SADD= sadd;/* source address*/g_dmaCTRLPKT.DADD= dadd;/* destinationaddress*/g_dmaCTRLPKT.CHCTRL= 0;/* channel control*/g_dmaCTRLPKT.FRCNT= 1;/* frame count*/g_dmaCTRLPKT.ELCNT= dsize;/* element count*/g_dmaCTRLPKT.ELDOFFSET = 0;/* element destination offset */g_dmaCTRLPKT.ELSOFFSET = 0;/* element source offset*/g_dmaCTRLPKT.FRDOFFSET = 0;/* frame destination offset*/g_dmaCTRLPKT.FRSOFFSET = 0;/* frame source offset*/g_dmaCTRLPKT.PORTASGN= 4;/* port b*/g_dmaCTRLPKT.RDSIZE= ACCESS_64_BIT;/* read size*/g_dmaCTRLPKT.WRSIZE= ACCESS_64_BIT;/* write size*/g_dmaCTRLPKT.TTYPE= FRAME_TRANSFER ;/* transfer type一个请求触发一帧传输*/g_dmaCTRLPKT.ADDMODERD = ADDR_FIXED;/* address mode read*/g_dmaCTRLPKT.ADDMODEWR = ADDR_FIXED;/* address mode write*/g_dmaCTRLPKT.AUTOINIT= AUTOINIT_ON;/* autoinit*/
}
/* USER CODE END */
,
Susan Yang:
请问您这是使用的TI例程?若是可以的话,请给出程序出处,谢谢
若不是例程的话,您可以私信一下工程,我们具体看一下
,
Cooper Zhang1:
请教一下就是CAN通信中我将IF2配置为RX,IF3使用DMA进行监控数据,这两个的数据来源是哪里,有什么区别?
2.为什么接受到的数据不一样(我是在调试模式下运行,有影响吗?)
3.我用两个CPU发送不同的数据A和B,为什么我的IF2和IF3接受到的数据不一样,一个显示接收数据A一个显示数据B。还有就是我单步运行时,IF2寄存器里可以看到接收数据,连续运行时,IF2里就不显示数据了
,
Susan Yang:
感谢您对TI产品的关注!
为更加有效地解决您的问题,我们建议您将问题发布在E2E英文技术论坛上( e2e.ti.com/…/312 ),将由资深的英文论坛工程师为您提供帮助。