TI中文支持网Part Number:TMS570LS3137
此器件中CPU双核 手册中写到Dual CPUs Running in Lockstep，请问有无如何实现双核同步的相关资料，实现机理是什么
Susan Yang：
A dual core lockstep processing solution built around ARM® Cortex®-R4F CPU that detects failures at the core boundary on a cycle by cycle basis. Special measures in processor layout, clock distribution, power distribution, reset distribution, and temporal diversity are all implemented to mitigate common cause failures of the logical CPU and its checker. For complete details on the ARM® Cortex®-R4F CPU, refer to the ARM® Cortex®-R4F Technical Reference Manual.
建议您参考下ARM® Cortex®-R4F Technical Reference Manual
https://developer.arm.com/documentation/ddi0363/e/Chdeagaa
双核锁步默认开启，不可关闭。锁步是双 ARM Cortex-R4F CPU 的操作模式。在每个 CPU 时钟周期比较两个 CPU 的输出。任何错误比较都被标记为最高严重级别的错误。Cortex-R4F 的 CPU 比较模块 (CCM-R4F) 比较两个 Cortex-R4F CPU 的输出。
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zhexiang xie：
请问双 ARM Cortex-R4F CPU 中如何达到同步的，Cortex-R4F 的 CPU 比较模块 (CCM-R4F) 是如何响应错误来重新达到双核同步的，可以达到同步的指标是多少？是否有具体的参考资料？
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Susan Yang：
zhexiang xie 说：是否有具体的参考资料？
抱歉，目前没有相关的参考的资料
zhexiang xie 说：请问双 ARM Cortex-R4F CPU 中如何达到同步的，Cortex-R4F 的 CPU 比较模块 (CCM-R4F) 是如何响应错误来重新达到双核同步的
我会在确认后给您回复
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Susan Yang：
以下是国外工程师的回复，请您查看
The two processors are initialized to the same state during system start-up, and they receive the same inputs, so during normal operation the state of the two processors is identical from clock to clock.
An error in either processor will cause a difference between the states of the two processors, which will eventually be manifested as a difference in the outputs. The CCM-R4F module monitors the outputs of the two processors and flags an error in the case of a discrepancy.
Not all internal registers of the Cortex-R4F CPU have fixed values upon reset. To avoid an erroneous CCMR4F compare error, the application software needs to ensure that the CPU registers of both CPUs are initialized with the same values before the registers are used, including function calls where the register values are pushed onto the stack.
