Part Number:MSP430FR2433
为什么我串口助手不管在何种波特率下输入01回来都是7F而且我改变代码让他一直输出01但是还是要先接收后输出7F,代码的改变不能改变功能,我把发送放在主函数里面while(1)里一直发送功能没有变还是要先发送再接受数据与截图一样。
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IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* **MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** //MSP430FR243x Demo - eUSCI_A0 UART echo at 9600 baud using BRCLK = 8MHz // // Description: This demo echoes back characters received via a PC serial port. // SMCLK/ DCO is used as a clock source and the device is put in LPM3 // The auto-clock enable feature is used by the eUSCI and SMCLK is turned off // when the UART is idle and turned on when a receive edge is detected. // Note that level shifter hardware is needed to shift between RS232 and MSP // voltage levels. // // The example code shows proper initialization of registers // and interrupts to receive and transmit data. // To test code in LPM3, disconnect the debugger. // // ACLK = REFO = 32768Hz, MCLK = DCODIV = SMCLK = 8MHz. // //MSP430FR2433 //----------------- ///|\|| //| || //--|RST| //|| //|| //|P1.4/UCA0TXD|----> PC (echo) //|P1.5/UCA0RXD|<---- PC //|| // //Ling Zhu //Texas Instruments Inc. //Jan 2018 //Built with IAR Embedded Workbench v7.10 & Code Composer Studio v7.3 //****************************************************************************** #include <msp430.h> void Software_Trim();// Software Trim to get the best DCOFTRIM value #define MCLK_FREQ_MHZ 8// MCLK = 8MHz void Init_GPIO(); int main(void) {WDTCTL = WDTPW | WDTHOLD;// Stop watchdog timer// Configure GPIOInit_GPIO();PM5CTL0 &= ~LOCKLPM5;// Disable the GPIO power-on default high-impedance mode// to activate 1previously configured port settings__bis_SR_register(SCG0);// disable FLLCSCTL3 |= SELREF__REFOCLK;// Set REFO as FLL reference sourceCSCTL1 = DCOFTRIMEN | DCOFTRIM0 | DCOFTRIM1 | DCORSEL_3;// DCOFTRIM=3, DCO Range = 8MHzCSCTL2 = FLLD_0 + 243;// DCODIV = 8MHz__delay_cycles(3);__bic_SR_register(SCG0);// enable FLLSoftware_Trim();// Software Trim to get the best DCOFTRIM valueCSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz// default DCODIV as MCLK and SMCLK source// Configure UART pinsP1SEL0 |= BIT4 | BIT5;// set 2-UART pin as second function// Configure UARTUCA0CTLW0 |= UCSWRST;UCA0CTLW0 |= UCSSEL__SMCLK;// Baud Rate calculation// 8000000/(16*9600) = 52.083// Fractional portion = 0.083// User's Guide Table 14-4: UCBRSx = 0x49// UCBRFx = int ( (52.083-52)*16) = 1UCA0BR0 = 52;// 8000000/16/9600UCA0BR1 = 0x00;UCA0MCTLW = 0x4900 | UCOS16 | UCBRF_1;UCA0CTLW0 &= ~UCSWRST;// Initialize eUSCIUCA0IE |= UCRXIE;// Enable USCI_A0 RX interrupt__bis_SR_register(LPM3_bits|GIE);// Enter LPM3, interrupts enabled__no_operation();// For debugger } #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=USCI_A0_VECTOR __interrupt void USCI_A0_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(USCI_A0_VECTOR))) USCI_A0_ISR (void) #else #error Compiler not supported! #endif {switch(__even_in_range(UCA0IV,USCI_UART_UCTXCPTIFG)){case USCI_NONE: break;case USCI_UART_UCRXIFG:while(!(UCA0IFG&UCTXIFG));UCA0TXBUF = UCA0RXBUF;__no_operation();break;case USCI_UART_UCTXIFG: break;case USCI_UART_UCSTTIFG: break;case USCI_UART_UCTXCPTIFG: break;default: break;} } void Init_GPIO() {P1DIR = 0xFF; P2DIR = 0xFF; P3DIR = 0xFF;P1REN = 0xFF; P2REN = 0xFF; P3REN = 0xFF;P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; } void Software_Trim() {unsigned int oldDcoTap = 0xffff;unsigned int newDcoTap = 0xffff;unsigned int newDcoDelta = 0xffff;unsigned int bestDcoDelta = 0xffff;unsigned int csCtl0Copy = 0;unsigned int csCtl1Copy = 0;unsigned int csCtl0Read = 0;unsigned int csCtl1Read = 0;unsigned int dcoFreqTrim = 3;unsigned char endLoop = 0;do{CSCTL0 = 0x100;// DCO Tap = 256do{CSCTL7 &= ~DCOFFG;// Clear DCO fault flag}while (CSCTL7 & DCOFFG);// Test DCO fault flag__delay_cycles((unsigned int)3000 * MCLK_FREQ_MHZ);// Wait FLL lock status (FLLUNLOCK) to be stable// Suggest to wait 24 cycles of divided FLL reference clockwhile((CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) && ((CSCTL7 & DCOFFG) == 0));csCtl0Read = CSCTL0;// Read CSCTL0csCtl1Read = CSCTL1;// Read CSCTL1oldDcoTap = newDcoTap;// Record DCOTAP value of last timenewDcoTap = csCtl0Read & 0x01ff;// Get DCOTAP value of this timedcoFreqTrim = (csCtl1Read & 0x0070)>>4;// Get DCOFTRIM valueif(newDcoTap < 256)// DCOTAP < 256{newDcoDelta = 256 - newDcoTap;// Delta value between DCPTAP and 256if((oldDcoTap != 0xffff) && (oldDcoTap >= 256)) // DCOTAP cross 256endLoop = 1;// Stop while loopelse{dcoFreqTrim--;CSCTL1 = (csCtl1Read & (~(DCOFTRIM0+DCOFTRIM1+DCOFTRIM2))) | (dcoFreqTrim<<4);}}else// DCOTAP >= 256{newDcoDelta = newDcoTap - 256;// Delta value between DCPTAP and 256if(oldDcoTap < 256)// DCOTAP cross 256endLoop = 1;// Stop while loopelse{dcoFreqTrim++;CSCTL1 = (csCtl1Read & (~(DCOFTRIM0+DCOFTRIM1+DCOFTRIM2))) | (dcoFreqTrim<<4);}}if(newDcoDelta < bestDcoDelta)// Record DCOTAP closest to 256{csCtl0Copy = csCtl0Read;csCtl1Copy = csCtl1Read;bestDcoDelta = newDcoDelta;}}while(endLoop == 0);// Poll until endLoop == 1CSCTL0 = csCtl0Copy;// Reload locked DCOTAPCSCTL1 = csCtl1Copy;// Reload locked DCOFTRIMwhile(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // Poll until FLL is locked }
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