TI中文支持网请教各位专家：
使用CCS的SYS/BIOS建立使用CLA 的工程，使用芯片F28377D。请问如何处理CLA的存储器段.SECTION 问题。如数据段Cla1ToCpuMsgRAM，CpuToCla1MsgRAM，Cla1funcsRunStart，Cla1funcsLoadStart等，这些在文件“F2837xD_Headers_BIOS_cpu1.cmd”，及编译出的文件“*.map”中均没有找到。
在非SYS/BIOS工程中有设置数据段：
#ifdef __cplusplus
#pragma DATA_SECTION("Cla1ToCpuMsgRAM")
CLA存储器配置初始化函数：
void CLA_configClaMemory(void)
{
extern uint32_t Cla1funcsRunStart, Cla1funcsLoadStart, Cla1funcsLoadSize;
EALLOW;
#ifdef _FLASH
// Copy over code from FLASH to RAM
memcpy((uint32_t *)&Cla1funcsRunStart, (uint32_t *)&Cla1funcsLoadStart,
(uint32_t)&Cla1funcsLoadSize);
#endif //_FLASH
这些内容在SYS/BIOS工程中如何配置？
Susan Yang：
请您参考类似下面的cmd。
/** Copyright (c) 2015-2017, Texas Instruments Incorporated* All rights reserved.** Redistribution and use in source and binary forms, with or without* modification, are permitted provided that the following conditions* are met:** *Redistributions of source code must retain the above copyright*notice, this list of conditions and the following disclaimer.** *Redistributions in binary form must reproduce the above copyright*notice, this list of conditions and the following disclaimer in the*documentation and/or other materials provided with the distribution.** *Neither the name of Texas Instruments Incorporated nor the names of*its contributors may be used to endorse or promote products derived*from this software without specific prior written permission.** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.*/ /**======== TMS320F28379D.cmd ========*Define the memory block start/length for the F28379D*/// Define a size for the CLA scratchpad area that will be used // by the CLA compiler for local symbols and temps // Also force references to the special symbols that mark the // scratchpad are. CLA_SCRATCHPAD_SIZE = 0x100; --undef_sym=__cla_scratchpad_end --undef_sym=__cla_scratchpad_startMEMORY {/* BEGIN is used for the "boot to FLASH" bootloader mode*/BEGIN: origin = 0x080000, length = 0x000002BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack *//* Flash sectors */FLASHA: origin = 0x080002, length = 0x001FFE/* on-chip Flash */FLASHB: origin = 0x082000, length = 0x002000/* on-chip Flash */FLASHC: origin = 0x084000, length = 0x002000/* on-chip Flash */FLASHD: origin = 0x086000, length = 0x002000/* on-chip Flash */FLASHE: origin = 0x088000, length = 0x008000/* on-chip Flash */FLASHF: origin = 0x090000, length = 0x008000/* on-chip Flash */FLASHG: origin = 0x098000, length = 0x008000/* on-chip Flash */FLASHH: origin = 0x0A0000, length = 0x008000/* on-chip Flash */FLASHI: origin = 0x0A8000, length = 0x008000/* on-chip Flash */FLASHJ: origin = 0x0B0000, length = 0x008000/* on-chip Flash */FLASHK: origin = 0x0B8000, length = 0x002000/* on-chip Flash */FLASHL: origin = 0x0BA000, length = 0x002000/* on-chip Flash */FLASHM: origin = 0x0BC000, length = 0x002000/* on-chip Flash */FLASHN: origin = 0x0BE000, length = 0x002000/* on-chip Flash */RESET: origin = 0x3FFFC0, length = 0x000002M01SARAM : origin = 0x000122, length = 0x0006DE/* on-chip RAM */D01SARAM : origin = 0x00B000, length = 0x001000/* Local Shared RAM (between CPU and CLA) sections*/ //LS02SARAM : origin = 0x008000, length = 0x001800 /* on-chip RAM */ //LS35SARAM : origin = 0x009800, length = 0x001800 /* on-chip RAM */RAMLS0: origin = 0x008000,length = 0x000800RAMLS1: origin = 0x008800,length = 0x000800RAMLS2: origin = 0x009000,length = 0x000800RAMLS3: origin = 0x009800,length = 0x000800RAMLS4_5: origin = 0x00A000,length = 0x001000/* on-chip Global shared RAMs */RAMGS07: origin = 0x00C000, length = 0x008000RAMGS815 : origin = 0x014000, length = 0x008000 //RAMGS0: origin = 0x00C000, length = 0x001000 //RAMGS1: origin = 0x00D000, length = 0x001000 //RAMGS2: origin = 0x00E000, length = 0x001000 //RAMGS3: origin = 0x00F000, length = 0x001000 //RAMGS4: origin = 0x010000, length = 0x001000 //RAMGS5: origin = 0x011000, length = 0x001000 //RAMGS6: origin = 0x012000, length = 0x001000 //RAMGS7: origin = 0x013000, length = 0x001000 //RAMGS8: origin = 0x014000, length = 0x001000 //RAMGS9: origin = 0x015000, length = 0x001000 //RAMGS10 : origin = 0x016000, length = 0x001000 //RAMGS11 : origin = 0x017000, length = 0x001000 //RAMGS12 : origin = 0x018000, length = 0x001000 //RAMGS13 : origin = 0x019000, length = 0x001000 //RAMGS14 : origin = 0x01A000, length = 0x001000 //RAMGS15 : origin = 0x01B000, length = 0x001000/* Shared MessageRam *//* CPU1 and CPU2 */CPU2TOCPU1RAM: origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM: origin = 0x03FC00, length = 0x000400/* CPU and CLA */CLA1_MSGRAMLOW: origin = 0x001480,length = 0x000080CLA1_MSGRAMHIGH: origin = 0x001500,length = 0x000080 }SECTIONS {/* Allocate program areas: */.cinit: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN.binit: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN #ifdef __TI_EABI__.init_array: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN #else.pinit: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN #endif.text: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHNcodestart: > BEGINramfuncs: LOAD = FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHNRUN= RAMGS07LOAD_START(RamfuncsLoadStart),LOAD_SIZE(RamfuncsLoadSize),LOAD_END(RamfuncsLoadEnd),RUN_START(RamfuncsRunStart),RUN_SIZE(RamfuncsRunSize),RUN_END(RamfuncsRunEnd)#ifdef __TI_COMPILER_VERSION__ #if __TI_COMPILER_VERSION__ >= 15009000.TI.ramfunc : {} LOAD = FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN,RUN= RAMGS07,table(BINIT) #endif #endif/* Allocate uninitalized data sections: */.stack: > M01SARAM | RAMGS07 #ifdef __TI_EABI__.bss: > M01SARAM | RAMGS07.sysmem: > RAMGS07 | M01SARAM.data: > M01SARAM | RAMGS07 #else.ebss: > M01SARAM | RAMGS07.esysmem: > RAMGS07 | M01SARAM #endif.cio: > RAMGS07 | M01SARAM/* Initalized sections go in Flash */ #ifdef __TI_EABI__.const: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN #else.econst: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN #endif.switch: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHN.args: > FLASHA | FLASHB | FLASHC | FLASHD | FLASHE |FLASHF | FLASHG | FLASHH | FLASHI | FLASHJ |FLASHK | FLASHL | FLASHM | FLASHNFilter_RegsFile: > RAMGS07/* CLA specific sections */Cla1Prog: LOAD = FLASHD,RUN = RAMLS4_5,LOAD_START(Cla1funcsLoadStart),LOAD_END(Cla1funcsLoadEnd),RUN_START(Cla1funcsRunStart),LOAD_SIZE(Cla1funcsLoadSize),ALIGN(8)CLADataLS: > RAMLS0 | RAMLS1Cla1ToCpuMsgRAM: > CLA1_MSGRAMLOWCpuToCla1MsgRAM: > CLA1_MSGRAMHIGH/* CLA C compiler sections *///// Must be allocated to memory the CLA has write access to//CLAscratch:{ *.obj(CLAscratch). += CLA_SCRATCHPAD_SIZE;*.obj(CLAscratch_end) } >RAMLS1.scratchpad: > RAMLS1.bss_cla: > RAMLS1.const_cla:LOAD = FLASHB,RUN = RAMLS1,RUN_START(Cla1ConstRunStart),LOAD_START(Cla1ConstLoadStart),LOAD_SIZE(Cla1ConstLoadSize)/* The following section definitions are required when using the IPC API Drivers */GROUP : > CPU1TOCPU2RAM{PUTBUFFERPUTWRITEIDXGETREADIDX}GROUP : > CPU2TOCPU1RAM{GETBUFFER :TYPE = DSECTGETWRITEIDX :TYPE = DSECTPUTREADIDX :TYPE = DSECT} }
,
jiujun sun：
谢谢你的指导！请问TI官方是否有F28377D适合CLA和SYS/BIOS在同一个工程的.CMD文件。如果没有，是否需在现有的CMD文件上手动更改？
,
Susan Yang：
“请问TI官方是否有F28377D适合CLA和SYS/BIOS在同一个工程的.CMD文件。”
据我所知是没有的，您需要自己来进行修改
