TI中文支持网Part Number:TMS320F28335
设定三个正弦波sin1，sin2，sin3，各相差120度，在正弦波sin1过零点时使PWM1载波移相180度，在正弦波sin2过零点时使PWM2载波移相180度，在正弦波sin3过零点时是PWM3载波移相180度。
问题1:PWM1无法移相，通过示波器观测，在sin1过零点时没有移相，单独强制PWM1移相也没有移相（已使能）。
问题2，三个相差120度的正弦波不会存在同时过零点，但通过示波器观测会出现PWM2和PWM3同时移相（也会不同时移相）。
//PWM配置
void InitEPwm1(void)
{
// step1 配置时钟
EALLOW;
SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1; // ePWM1
EPwm1Regs.TBPRD = PWM_HALF_PRD; // 设置周期,在DSP2833x_EPwm_defines.h中设置
EPwm1Regs.TBPHS.half.TBPHS = PWM_HALF_PRD; // 相位偏移置0
EPwm1Regs.TBCTR = 0x0000; // 清计数器初始值
// 配置计数模式
EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // 增减计数模式,
EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE; // 禁止相位装载,
EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT ,
EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK=SYSCLKOUT/(HSPCLKDIV*CLKDIV)=120MHz
EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; // The TB_PRD register (TBPRD) is loaded from its shadow register设置是否使用影子寄存器,
// when the time-base counter,TBCTR, is equal to zero
EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module，同步输出选择设定,
// Setup shadowing
EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //
EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //,
EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; //,
// 配置动作
EPwm1Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
EPwm1Regs.AQCTLB.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm1Regs.AQCTLB.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
// 配置死区
EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL; // enable Dead-band module
EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active low complementary (ALC) mode. EPWMxA is inverted
EPwm1Regs.DBCTL.bit.OUT_MODE = DB_DISABLE; // 低电平有效，互补输,在DSP2803x_EPwm_defines.h中设置
EPwm1Regs.DBFED = 120; // 下降沿死区 TBCLKs,120/120Mhz=1us
EPwm1Regs.DBRED = 120; // 上升沿死区 120/120Mhz=1us,
EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // PWMxA强制输出低
EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // PWMxB强制输出低
//EPwm1Regs.TZFRC.bit.OST = 1; // 禁止PWM输出
//EPwm1Regs.TZEINT.bit.OST = 1; // 启用TZ中断
EPwm1Regs.TZSEL.bit.OSHT1 = TZ_ENABLE; // TZ1作为一次错误源
EDIS;
}
/**
**********************************************************************************
* @funcation :void InitEPwm2(void)
* @author :ZhouLH
* @date :20190911
* @brief :pwm2初始化
* @attention :
**********************************************************************************
*/
void InitEPwm2(void)
{
// 配置时钟
EALLOW;
SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1; // ePWM2
EPwm2Regs.TBPRD = PWM_HALF_PRD; // 设置周期,在DSP2833x_EPwm_defines.h中设置
EPwm2Regs.TBPHS.half.TBPHS = 0x0000; // 相位偏移置0
EPwm2Regs.TBCTR = 0x0000; // 清计数器初始值
// 配置计数模式
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // 增减计数模式,
EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // 禁止相位装载,
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT ,
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK=SYSCLKOUT/(HSPCLKDIV*CLKDIV)=60MHz
EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW; // The TB_PRD register (TBPRD) is loaded from its shadow register设置是否使用影子寄存器,
// when the time-base counter,TBCTR, is equal to zero
EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module，同步输出选择设定,
// Setup shadowing
EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //
EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //,
EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; //,
// 配置动作
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
EPwm2Regs.AQCTLB.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm2Regs.AQCTLB.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
// 配置死区
EPwm2Regs.DBCTL.bit.IN_MODE = DBA_ALL; // enable Dead-band module
EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active high complementary mode. EPWMxA is inverted
EPwm2Regs.DBCTL.bit.OUT_MODE = DB_DISABLE; // 低电平有效，互补输,在DSP2803x_EPwm_defines.h中设置
EPwm2Regs.DBFED = 120; // 下降沿死区 TBCLKs,120/120Mhz=1us
EPwm2Regs.DBRED = 120; // 上升沿死区 120/120Mhz=1us,
EPwm2Regs.TZCTL.bit.TZA = TZ_FORCE_LO; // PWMxA强制输出低
EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // PWMxB强制输出低
//EPwm2Regs.TZFRC.bit.OST = 1; // 禁止PWM输出
//EPwm2Regs.TZEINT.bit.OST = 1; // 启用TZ中断
EPwm2Regs.TZSEL.bit.OSHT1=TZ_ENABLE; // TZ1作为一次错误源
EDIS;
}
/**
**********************************************************************************
* @funcation :void InitEPwm3(void)
* @author :ZhouLH
* @date :20190911
* @brief :pwm3初始化
* @attention :
**********************************************************************************
*/
void InitEPwm3(void)
{
// 配置时钟
EALLOW;
SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1; // ePWM3
EPwm3Regs.TBPRD = PWM_HALF_PRD; // 设置周期,在DSP2833x_EPwm_defines.h中设置
EPwm3Regs.TBPHS.half.TBPHS = 0x0000; // 相位偏移置0
EPwm3Regs.TBCTR = 0x0000; // 清计数器初始值
// 配置计数模式
EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // 增减计数模式,
EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE; // 禁止相位装载,
EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT ,
EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1; // TBCLK=SYSCLKOUT/(HSPCLKDIV*CLKDIV)=60MHz
EPwm3Regs.TBCTL.bit.PRDLD = TB_SHADOW; // The TB_PRD register (TBPRD) is loaded from its shadow register设置是否使用影子寄存器,
// when the time-base counter,TBCTR, is equal to zero
EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // Sync down-stream module，同步输出选择设定,
// Setup shadowing
EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; //
EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; //,
EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load on Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; //,
// 配置动作
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
EPwm3Regs.AQCTLB.bit.CAU = AQ_SET; // Set PWM1A on event A, up count
EPwm3Regs.AQCTLB.bit.CAD = AQ_CLEAR; // Clear PWM1A on event A, down count
// 配置死区
EPwm3Regs.DBCTL.bit.IN_MODE = DBA_ALL; // enable Dead-band module
EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC; // Active low complementary (ALC) mode. EPWMxA is inverted
EPwm3Regs.DBCTL.bit.OUT_MODE = DB_DISABLE; // 低电平有效，互补输,在DSP2803x_EPwm_defines.h中设置
EPwm3Regs.DBFED = 120; // 下降沿死区 TBCLKs,120/120Mhz=1us
EPwm3Regs.DBRED = 120; // 上升沿死区 120/120Mhz=1us,
EPwm3Regs.TZCTL.bit.TZA=TZ_FORCE_LO; // PWMxA强制输出低
EPwm3Regs.TZCTL.bit.TZB=TZ_FORCE_LO; // PWMxB强制输出低
//EPwm3Regs.TZFRC.bit.OST= 1; // 禁止PWM输出
//EPwm3Regs.TZEINT.bit.OST = 1; // 启用TZ中断
EPwm3Regs.TZSEL.bit.OSHT1=TZ_ENABLE; // TZ1作为一次错误源
EDIS;
}
//程序运行段
static void DoubleTrPWM(float32 alpha,float32 beta)
{
float32 Va, Vb, Vc,vac_offset,va_ctrl,vb_ctrl,vc_ctrl;
static float32 i = 0,flag1 = 1,flag0 = 1;
static Uint16 EPwm1Flag = 1,EPwm2Flag = 1,EPwm3Flag = 1;
Va = alpha;
Vb = (-alpha + SQRT3 * beta) * 0.5F;
Vc = (-alpha – SQRT3 * beta) * 0.5F;
Va = sin(i+2*3.14F/3);
Vb = sin(i-2*3.14F/3);
Vc = sin(i);
i = i + 0.0314;
if(i>6.28) i = 0;
VIENNA_dVal1 = Va;
VIENNA_dVal2 = Vb;
VIENNA_dVal3 = Vc;
vac_offset = svpwm_gen_func(Va, Vb, Vc);
va_ctrl = Va – vac_offset;
vb_ctrl = Vb – vac_offset;
vc_ctrl = Vc – vac_offset;
if(Va< 0 && EPwm1Flag == 1)
{
EPwm1Regs.TBPHS.half.TBPHS = PWM_HALF_PRD;
EPwm1Flag = 0;
}else if(Va > 0 && EPwm1Flag == 0)
{
EPwm1Regs.TBPHS.half.TBPHS = 0;
EPwm1Flag = 1;
}
if(Vb < 0 && EPwm2Flag == 1)
{
EPwm2Regs.TBPHS.half.TBPHS = PWM_HALF_PRD;
EPwm2Flag = 0;
}else if(Vb > 0 && EPwm2Flag == 0)
{
EPwm2Regs.TBPHS.half.TBPHS = 0;
EPwm2Flag = 1;
}
if(Vc < 0 && EPwm3Flag == 1)
{
EPwm3Regs.TBPHS.half.TBPHS = PWM_HALF_PRD;
EPwm3Flag = 0;
}else if(Vc > 0 && EPwm3Flag == 0)
{
EPwm3Regs.TBPHS.half.TBPHS = 0;
EPwm3Flag = 1;
}
va_ctrl = fabs(va_ctrl);
vb_ctrl = fabs(vb_ctrl);
vc_ctrl = fabs(vc_ctrl);
va_ctrl = 0.5;
vb_ctrl = 0.5;
vc_ctrl = 0.5;
EPwm1Regs.CMPA.half.CMPA = va_ctrl*PWM_HALF_PRD;
EPwm2Regs.CMPA.half.CMPA = vb_ctrl*PWM_HALF_PRD;
EPwm3Regs.CMPA.half.CMPA = vc_ctrl*PWM_HALF_PRD;
}
Green Deng：
PWM1是基准，不能移相的
,
user6032433：
那我在使用的时候可以不去配置PWM1吗，还是说只要用到了PWM就必须配置PWM1.
,
Green Deng：
你好，可能昨晚说的太简单了，不够全面，重新说明一下
因为我看到你的程序中是用了同步的，同步的PWM2\3的相位是基于PWM1的时基来移相的。也就是PWM1一般是作为“主机”，不操作移相的。
同时，由于PWM2\3的同步信号都是来自于PWM1的，所以还是要配置PWM1的。
