TI中文支持网Part Number:TMS320F28377D
你好，我在第一次使用TMS320F28377D芯片，想要利用C2PROG通过SCI串口将程序烧写进芯片中，将GPIO72置高，GPIO84置低，断电重启，照理说进入了SCI_Bootloader模式，但是烧写不成功，其中hex文件是由CCS生成的，串口也能正常通讯。以下是烧写的截图
在之前使用28335芯片时，可以烧写成功。
在这种情况下，我的问题如下：1、我这种行为应该称为一次Bootloader吧？应该不需要改动cmd文件吧？因为我记得28335不需要改动cmd配置即可烧写，还是说28335也需要改动cmd文件，只是因为我看书不认真，没注意？
2、烧写不成功的原因有哪些？比如：需要修改文件配置，而我没有做？如果是这种原因，我希望您能指导我如何配置；我将我的cmd代码附上，麻烦您看一下；
3、官方提供的例程中，有一个F2837xD_sci_flash_kernels的例程，这个例程的内容应该是二次bootloader吧？还是说它其实是一次bootloader，我应该按照这个例程学习？
我问的问题有点新手，麻烦您了，谢谢。
MEMORY
{
PAGE 0 : /* Program Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation *//* BEGIN is used for the "boot to Flash" bootloader modeIPCBootCPU*/BEGIN : origin = 0x080000, length = 0x000002RAMM0 : origin = 0x000122, length = 0x0002DERAMD0 : origin = 0x00B000, length = 0x000800RAMLS0 : origin = 0x008000, length = 0x000800RAMLS1 : origin = 0x008800, length = 0x000800RAMLS2 : origin = 0x009000, length = 0x000800RAMLS3 : origin = 0x009800, length = 0x000800RAMLS4 : origin = 0x00A000, length = 0x000800RESET : origin = 0x3FFFC0, length = 0x000002/* Flash sectors */FLASHA: origin = 0x080002, length = 0x001FFE /* on-chip Flash */FLASHB: origin = 0x082000, length = 0x002000 /* on-chip Flash */FLASHC: origin = 0x084000, length = 0x002000 /* on-chip Flash */FLASHD: origin = 0x086000, length = 0x002000 /* on-chip Flash */FLASHE: origin = 0x088000, length = 0x008000 /* on-chip Flash */FLASHF: origin = 0x090000, length = 0x008000 /* on-chip Flash */FLASHG: origin = 0x098000, length = 0x008000 /* on-chip Flash */FLASHH: origin = 0x0A0000, length = 0x008000 /* on-chip Flash */FLASHI: origin = 0x0A8000, length = 0x008000 /* on-chip Flash */FLASHJ: origin = 0x0B0000, length = 0x008000 /* on-chip Flash */FLASHK: origin = 0x0B8000, length = 0x002000 /* on-chip Flash */FLASHL: origin = 0x0BA000, length = 0x002000 /* on-chip Flash */FLASHM: origin = 0x0BC000, length = 0x002000 /* on-chip Flash */FLASHN: origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
PAGE 1 : /* Data Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */BOOT_RSVD: origin = 0x000002, length = 0x000120/* Part of M0, BOOT rom will use this for stack */RAMM1: origin = 0x000400, length = 0x000400/* on-chip RAM block M1 */RAMD1: origin = 0x00B800, length = 0x000800RAMLS5: origin = 0x00A800, length = 0x000800
/**↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓**CPU1**↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓**/RAMGS0: origin = 0x00C000, length = 0x001000RAMGS1: origin = 0x00D000, length = 0x001000RAMGS2: origin = 0x00E000, length = 0x001000
// RAMGS3: origin = 0x00F000, length = 0x001000
// RAMGS4: origin = 0x010000, length = 0x001000
// RAMGS5: origin = 0x011000, length = 0x001000RAMGS345: origin = 0x00F000, length = 0x003000
//RAMGS6: origin = 0x012000, length = 0x001000RAMGS6_0: origin = 0x012000, length = 0x000100RAMGS6_1: origin = 0x012100, length = 0x000100RAMGS6_2: origin = 0x012200, length = 0x000800RAMGS6_3: origin = 0x012A00, length = 0x000080RAMGS6_4: origin = 0x012A80, length = 0x000040RAMGS6_5: origin = 0x012AC0, length = 0x000040RAMGS6_6: origin = 0x012B00, length = 0x000500RAMGS7: origin = 0x013000, length = 0x001000RAMGS8: origin = 0x014000, length = 0x001000RAMGS9: origin = 0x015000, length = 0x001000
/**↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓**CPU2**↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓↓**/RAMGS10: origin = 0x016000, length = 0x001000RAMGS11: origin = 0x017000, length = 0x001000
//RAMGS12: origin = 0x018000, length = 0x001000/* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */RAMGS12_0: origin = 0x018000, length = 0x000800RAMGS12_1: origin = 0x018800, length = 0x000800RAMGS13: origin = 0x019000, length = 0x001000/* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */RAMGS14: origin = 0x01A000, length = 0x001000/* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */RAMGS15: origin = 0x01B000, length = 0x001000/* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */CPU2TOCPU1RAM: origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM: origin = 0x03FC00, length = 0x000400
}
SECTIONS
{/* Allocate program areas: */.cinit: > FLASHBPAGE = 0, ALIGN(4).pinit: > FLASHB,PAGE = 0, ALIGN(4).text: >> FLASHB | FLASHC | FLASHD | FLASHEPAGE = 0, ALIGN(4)codestart: > BEGINPAGE = 0, ALIGN(4)/* Allocate uninitalized data sections: */.stack: > RAMM1PAGE = 1.ebss: >> RAMLS5 | RAMGS0 | RAMGS1PAGE = 1.esysmem: > RAMLS5PAGE = 1/* Initalized sections go in Flash */.econst: >> FLASHF | FLASHG | FLASHHPAGE = 0, ALIGN(4).switch: > FLASHBPAGE = 0, ALIGN(4).reset: > RESET,PAGE = 0, TYPE = DSECT /* not used, */Filter_RegsFile: > RAMGS0,PAGE = 1SHARERAMGS0 : > RAMGS0, PAGE = 1SHARERAMGS1 : > RAMGS1, PAGE = 1SHARERAMGS2 : > RAMGS2, PAGE = 1
//SHARERAMGS3 : > RAMGS3, PAGE = 1
//SHARERAMGS4 : > RAMGS4, PAGE = 1
//SHARERAMGS5 : > RAMGS5, PAGE = 1
//SHARERAMGS6 : > RAMGS6, PAGE = 1SHARERAMGS7 : > RAMGS7, PAGE = 1SHARERAMGS8 : > RAMGS8, PAGE = 1SHARERAMGS9 : > RAMGS9, PAGE = 1SHARERAMGS10 : > RAMGS10, PAGE = 1SHARERAMGS11 : > RAMGS11, PAGE = 1
//SHARERAMGS12 : > RAMGS12, PAGE = 1SHARERAMGS13 : > RAMGS13, PAGE = 1SHARERAMGS14 : > RAMGS14, PAGE = 1SHARERAMGS15 : > RAMGS15, PAGE = 1/* Allocate DMA-accessible RAM sections: */DMARAMGS345: >RAMGS345PAGE = 1GSRAM_SCOPE: >RAMGS8PAGE = 1 /* CPU1:R/WCPU2:R*/C1SHRAM_SETUP: > RAMGS6_0PAGE = 1C1SHRAM_RUNTIME: > RAMGS6_1PAGE = 1C1SHRAM_REAL: > RAMGS6_2PAGE = 1C1SHRAM_PWM: > RAMGS6_3PAGE = 1C1SHRAM_TASKTIME: > RAMGS6_4PAGE = 1C1SHRAM_OUTPUT: > RAMGS6_5PAGE = 1C1SHRAM_C1TOC2: > RAMGS6_6PAGE = 1/* CPU1:RCPU2:R/W*/C2SHRAM_USB: > RAMGS12_0PAGE = 1C2SHRAM_R12_RCV: > RAMGS12_1PAGE = 1
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)
#elseramfuncs: LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)#endif
#endif/* The following section definitions are required when using the IPC API Drivers */GROUP : > CPU1TOCPU2RAM, PAGE = 1{PUTBUFFERPUTWRITEIDXGETREADIDX}GROUP : > CPU2TOCPU1RAM, PAGE = 1{GETBUFFER :TYPE = DSECTGETWRITEIDX : TYPE = DSECTPUTREADIDX :TYPE = DSECT}/* The following section definition are for SDFM examples */
//Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
//Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
//Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
//Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
//Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/
Green Deng：
你好，看一下datasheet，应该是72置低，84置高。
另外你看的例程确实是二次bootloader的，不适合你使用
,
user6242470：
您好，谢谢您的回答
应该是我描述错误，实际上的我把GPIO84置高、74置低了，但是还是没有烧写成功，我想确定一下，一次bootloader是不需要修改文件的吧？另外，我怀疑是C2prog的原因，请问您知道其他软件可以用来通过sci232串口烧写hex文件的吗？我想换个软件试试.
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Green Deng：
不需要修改工程。可以试一下将SCI引脚直接连接到PC端的串口引脚进行烧写，有些RS-232转RS-485的接口工具并不能很好工作
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user6242470：
明白了，谢谢您，我去试试
