AM5718的ehrpwm的周期中断

TI工程师您好！

      在使用AM5718做ehrmpwm的内核驱动里面的中断时，设置了周期中断可以用request_irq申请到ehrpwm2对应的209号中断，执行

echo 1 > /sys/class/pwm/pwmchip2/export
echo 1000000 >/sys/class/pwm/pwmchip2/pwm1/period

echo 1 >/sys/class/pwm/pwmchip2/pwm1/enable

也可以运行，在驱动里面读出中断标志寄存器打印也产生了中断标志，但没有进入注册的中断函数，看手册里面这样写

Software Generated Interrupts (SGIs): SGIs are generated by writing to the Cortex-A15 Software
Generated Interrupt Register (GICD_SGIR). A maximum of 16 SGIs (ID0–ID15) can be generated for
the CPU interface. An SGI has edge-triggered properties. The software triggering of the interrupt is
equivalent to the edge transition of the interrupt signal on a peripheral input.
• Private Peripheral Interrupts (PPIs): A PPI is an interrupt generated by a peripheral that is specific to
the processor. Although interrupts ID16–ID31 are dedicated to PPIs in general, only seven PPIs are
actually used for the CPU interface (ID25–ID31). Interrupts ID16–ID24 are reserved (not used).
• Shared Peripheral Interrupts (SPIs): SPIs are triggered by events generated on associated interrupt
input lines. In this device, the GIC is configured to support 160 SPIs corresponding to its external
IRQS[159:0] signals. SPIs start at ID32 and their mapping is presented in Section 17.3.1.
For detailed information about this module and description of SGIs and PPIs, see the ARM Cortex-A15
MPCore Technical Reference Manual (available at infocenter.arm.com/help/index.jsp).是否是AM5718只支持160个中断，而现在申请到的中断号是209，是否不支持，请解答，谢谢！

Shine：

是的，AM5718 MPU只支持160个硬件中断，请参考TRM手册17.1 Interrupt Controllers Overview。
Cortex®-A15 MPU Subsystem Interrupt Controller (MPU_INTC)
The MPU_INTC module (also called Generalized Interrupt Controller [GIC]) is a single functional unit that
is integrated in the Arm® Cortex-A15 multiprocessor core (MPCore) alongside Cortex-A15 processor. It
provides:
• 160 hardware interrupt inputs

www.ti.com/…/spruhz7i.pdf

,

xue feng：

那么给出这个160个中断号后面的中断号具体怎么用？该如何使用？执行cat /proc/interrupts后打印出来的160以后的中断号又是如何使用的？谢谢！
169:0CBAR28 Level4805b000.gpio
202:0CBAR29 Level4805d000.gpio
212:04805d000.gpio9 EdgeEnter
230:04805d000.gpio27 Edge4809c000.mmc cd
235:0CBAR30 Level48051000.gpio
248:048051000.gpio12 Edgetpd12s015 hpd
268:0CBAR 116 Level48053000.gpio
303:1038CBAR69 Level48020000.serial
306:30CBAR 251 Levelmbox_ipu1_ipc3x, mbox_dsp1_ipc3x
310:36CBAR 255 Levelmbox_ipu2_ipc3x
314:0CBAR35 Levelrproc-wdt
317:0CBAR38 Levelrproc-wdt
318:0CBAR39 Levelrproc-wdt
319:0CBAR40 Levelrproc-wdt
320:0CBAR41 Levelrproc-wdt
328:8CBAR 108 Levelomap_dmm_irq_handler
329:936CBAR51 Level48070000.i2c
330:89CBAR56 Level48060000.i2c
331:200CBAR55 Level4807c000.i2c
332:13534CBAR78 Levelmmc0
333:789CBAR81 Levelmmc1
334:13CBAR89 Levelmmc2
335:0CBAR23 Level40d01000.mmu
336:0CBAR 145 Level40d02000.mmu
337:0CBAR 395 Level58882000.mmu
338:0CBAR 396 Level55082000.mmu
341:0CBAR49 Levelahci[4a140000.sata]
342:4CBAR72 Edgedwc3-omap
343:5CBAR87 Edgedwc3-omap
344:0CBAR15 Levelgpmc
345:0CBAR 153 Level4846c000.mcasp_tx
346:0CBAR 152 Level4846c000.mcasp_rx
348:0CBAR 335 Level48484000.ethernet
349:0CBAR 336 Level48484000.ethernet
352:8CBAR16 LevelSGX ISR
357:0CBAR46 Level4b101000.sham
358:0CBAR47 Level48090000.rng
359:0CBAR 354 Levelvpe
360:0CBAR 351 Levelvip1-s0
361:0CBAR 392 Levelvip1-s1
362:221CBAR53 Levelomap_hdq
363:0CBAR 119 Levelcal
365:0CBAR20 LevelOMAP DISPC
366:0CBAR96 LevelOMAP HDMI

,

xue feng：

同时，参考手册上也说明EHRPWM2的中断是209,那么这个中断号应该是可用的，是否和只支持160个中断矛盾？

,

Shine：

EHRPWM2中断事件号是209，可以通过Interrupt Controller Crossbar映射到MPU_INTC的160个硬件中断。