TI中文支持网请问需要怎么设置CBC才能实现故障信号消失后，pwm恢复正常，如下设置可以吗
EALLOW;
EPwm2Regs.TZSEL.bit.CBC1 = 1;
EPwm2Regs.TZSEL.bit.CBC2 = 1;
EPwm2Regs.TZCTL.bit.TZA = TZ_FORCE_HI;
EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO;
EDIS;
EPwm2Regs.TBPRD = 6000; // Set timer period
EPwm2Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm2Regs.TBCTR = 0x0000; // Clear counter
// Setup TBCLK
EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4; // Clock ratio to SYSCLKOUT
EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV4; // Slow just to observe on the scope
EPwm2Regs.CMPA.half.CMPA = 3000;
EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; // Set PWM2A on CAU
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR; // Clear PWM2A on CAD
EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR; // Clear PWM2B on CAU
EPwm2Regs.AQCTLB.bit.CAD = AQ_SET; // Set PWM2B on CAD
Tony Chopper：
回复 Victor Zheng:
The specified condition on the pins is automatically cleared when the ePWM time-base counterreaches zero (TBCTR = 0x0000) if the trip event is no longer present. Therefore, in this mode, the tripevent is cleared or reset every PWM cycle.
请问您 这两句话 没看懂 既然是当计数器为0时才判断trip event是否还存在 怎么就“因此，每个PWM周期就清除一次” 此二者有因果关系吗？？？？计数器要变为0，应该不止一个PWM周期吧 谢谢
