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关于28377D CPU2 CLA烧写问题

2021-01-18 分类：C2000™ 32位实时 MCU 阅读(339)

我在使用28377D CPU2的CLA时，使用RAM仿真CLA中程序可以运行，烧到FLASH中后CLA程序内容并未运行，是CMD出问题了吗？烧写CLA有什么需要注意的吗？附件为我的CMD文件

4527.2837xD_FLASH_lnk_cpu1.txt

MEMORY
{
PAGE 0 :  /* Program Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation *//* BEGIN is used for the "boot to Flash" bootloader mode*/BEGIN	: origin = 0x080000, length = 0x000002RAMM0	: origin = 0x000122, length = 0x0002DERAMD0	: origin = 0x00B000, length = 0x000800RAMLS0	: origin = 0x008000, length = 0x000800RAMLS1	: origin = 0x008800, length = 0x000800RAMLS2		: origin = 0x009000, length = 0x000800RAMLS3		: origin = 0x009800, length = 0x000800RAMLS4		: origin = 0x00A000, length = 0x000800RESET	: origin = 0x3FFFC0, length = 0x000002/* Flash sectors */FLASHA: origin = 0x080002, length = 0x001FFE	/* on-chip Flash */FLASHB: origin = 0x082000, length = 0x002000	/* on-chip Flash */FLASHC: origin = 0x084000, length = 0x002000	/* on-chip Flash */FLASHD: origin = 0x086000, length = 0x002000	/* on-chip Flash */FLASHE: origin = 0x088000, length = 0x008000	/* on-chip Flash */FLASHF: origin = 0x090000, length = 0x008000	/* on-chip Flash */FLASHG: origin = 0x098000, length = 0x008000	/* on-chip Flash */FLASHH: origin = 0x0A0000, length = 0x008000	/* on-chip Flash */FLASHI: origin = 0x0A8000, length = 0x008000	/* on-chip Flash */FLASHJ: origin = 0x0B0000, length = 0x008000	/* on-chip Flash */FLASHK: origin = 0x0B8000, length = 0x002000	/* on-chip Flash */FLASHL: origin = 0x0BA000, length = 0x002000	/* on-chip Flash */FLASHM: origin = 0x0BC000, length = 0x002000	/* on-chip Flash */FLASHN: origin = 0x0BE000, length = 0x002000	/* on-chip Flash */

PAGE 1 : /* Data Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */BOOT_RSVD: origin = 0x000002, length = 0x000120/* Part of M0, BOOT rom will use this for stack */RAMM1: origin = 0x000400, length = 0x000400/* on-chip RAM block M1 */RAMD1: origin = 0x00B800, length = 0x000800RAMLS5: origin = 0x00A800, length = 0x000800RAMGS0: origin = 0x00C000, length = 0x001000RAMGS1: origin = 0x00D000, length = 0x001000RAMGS2: origin = 0x00E000, length = 0x001000RAMGS3: origin = 0x00F000, length = 0x001000RAMGS4: origin = 0x010000, length = 0x001000RAMGS5: origin = 0x011000, length = 0x001000RAMGS6: origin = 0x012000, length = 0x001000RAMGS7: origin = 0x013000, length = 0x001000RAMGS8: origin = 0x014000, length = 0x001000
/*RAMGS9: origin = 0x015000, length = 0x001000RAMGS10: origin = 0x016000, length = 0x001000RAMGS11: origin = 0x017000, length = 0x001000RAMGS12: origin = 0x018000, length = 0x001000RAMGS13: origin = 0x019000, length = 0x001000RAMGS14: origin = 0x01A000, length = 0x001000RAMGS15: origin = 0x01B000, length = 0x001000*/CPU2TOCPU1RAM: origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM: origin = 0x03FC00, length = 0x000400
}


SECTIONS
{/* Allocate program areas: */.cinit: > FLASHBPAGE = 0, ALIGN(4).pinit: > FLASHB,PAGE = 0, ALIGN(4).text: >> FLASHB | FLASHC | FLASHD | FLASHE | FLASHFPAGE = 0, ALIGN(4)codestart: > BEGINPAGE = 0, ALIGN(4)

/*memcpyfuncs: LOAD = FLASHA, PAGE = 0,RUN =  RAMGS1 | RAMGS2,PAGE = 1,LOAD_START(_memcpyStart),LOAD_END(_memcpyLoadEnd),RUN_START(_memcpyRunStart)*/ramfuncs: LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)/* Allocate uninitalized data sections: */.stack: > RAMM1PAGE = 1.ebss: >> RAMLS5 | RAMGS0 | RAMGS1PAGE = 1.esysmem: > RAMLS5PAGE = 1twiddleFactors: > RAMGS3,PAGE = 1buffer1: > RAMGS3, ALIGN = 256, PAGE = 1buffer2: > RAMGS3, ALIGN = 256, PAGE = 1/* Initalized sections go in Flash */.econst: >> FLASHF | FLASHG | FLASHHPAGE = 0, ALIGN(4).switch: > FLASHBPAGE = 0, ALIGN(4).reset: > RESET,PAGE = 0, TYPE = DSECT /* not used, */Filter_RegsFile: > RAMGS0,PAGE = 1SHARERAMGS0		: > RAMGS0,		PAGE = 1SHARERAMGS1		: > RAMGS1,		PAGE = 1ramgs0: > RAMGS0,PAGE = 1ramgs1: > RAMGS1,PAGE = 1
#ifdef __TI_COMPILER_VERSION
	#if __TI_COMPILER_VERSION >= 15009000
	.TI.ramfunc : {} LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)
	#endif
#endif/* The following section definitions are required when using the IPC API Drivers */GROUP : > CPU1TOCPU2RAM, PAGE = 1{PUTBUFFERPUTWRITEIDXGETREADIDX}GROUP : > CPU2TOCPU1RAM, PAGE = 1{GETBUFFER :TYPE = DSECTGETWRITEIDX :  TYPE = DSECTPUTREADIDX :TYPE = DSECT}/* The following section definition are for SDFM examples */Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444Difference_RegsFile : >RAMGS5, 	PAGE = 1, fill=0x3333
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Green Deng：

你好，你的工程在在线仿真的时候是运行正常的吗？CPU2的话需要使用CPU2对应的cmd文件

,

user4522357：

2837xD_FLASH_lnk_cpu2.txt

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_CMEMORY
{
PAGE 0 :/* Program Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation *//* BEGIN is used for the "boot to Flash" bootloader mode*/BEGIN: origin = 0x080000, length = 0x000002RAMM0: origin = 0x000080, length = 0x000380RAMD0: origin = 0x00B000, length = 0x000800RAMLS0: origin = 0x008000, length = 0x000800RAMLS1: origin = 0x008800, length = 0x000800RAMLS2: origin = 0x009000, length = 0x000800RAMLS3: origin = 0x009800, length = 0x000800//RAMLS4: origin = 0x00A000, length = 0x000800RAMLS4_5: origin = 0x00A000,length = 0x001000RAMGS14: origin = 0x01A000, length = 0x001000/* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */RAMGS15: origin = 0x01B000, length = 0x001000/* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */RESET: origin = 0x3FFFC0, length = 0x000002/* Flash sectors */FLASHA: origin = 0x080002, length = 0x001FFE	/* on-chip Flash */FLASHB: origin = 0x082000, length = 0x002000	/* on-chip Flash */FLASHC: origin = 0x084000, length = 0x002000	/* on-chip Flash */FLASHD: origin = 0x086000, length = 0x002000	/* on-chip Flash */FLASHE: origin = 0x088000, length = 0x008000	/* on-chip Flash */FLASHF: origin = 0x090000, length = 0x008000	/* on-chip Flash */FLASHG: origin = 0x098000, length = 0x008000	/* on-chip Flash */FLASHH: origin = 0x0A0000, length = 0x008000	/* on-chip Flash */FLASHI: origin = 0x0A8000, length = 0x008000	/* on-chip Flash */FLASHJ: origin = 0x0B0000, length = 0x008000	/* on-chip Flash */FLASHK: origin = 0x0B8000, length = 0x002000	/* on-chip Flash */FLASHL: origin = 0x0BA000, length = 0x002000	/* on-chip Flash */FLASHM: origin = 0x0BC000, length = 0x002000	/* on-chip Flash */FLASHN: origin = 0x0BE000, length = 0x002000	/* on-chip Flash */PAGE 1 : /* Data Memory *//* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */BOOT_RSVD: origin = 0x000002, length = 0x00007E/* Part of M0, BOOT rom will use this for stack */RAMM1: origin = 0x000400, length = 0x000400/* on-chip RAM block M1 */RAMD1: origin = 0x00B800, length = 0x000800//RAMLS5: origin = 0x00A800, length = 0x000800RAMGS0: origin = 0x00C000, length = 0x001000RAMGS1: origin = 0x00D000, length = 0x001000RAMGS9: origin = 0x015000, length = 0x001000RAMGS10: origin = 0x016000, length = 0x001000RAMGS11: origin = 0x017000, length = 0x001000RAMGS12: origin = 0x018000, length = 0x001000RAMGS13: origin = 0x019000, length = 0x001000CPU2TOCPU1RAM: origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM: origin = 0x03FC00, length = 0x000400CLA1_MSGRAMLOW: origin = 0x001480,length = 0x000080CLA1_MSGRAMHIGH: origin = 0x001500,length = 0x000080
}SECTIONS
{/* Allocate program areas: */.cinit: > FLASHBPAGE = 0, ALIGN(4).pinit: > FLASHB,PAGE = 0, ALIGN(4).text: >> FLASHB | FLASHC | FLASHD | FLASHEPAGE = 0, ALIGN(4)codestart: > BEGINPAGE = 0, ALIGN(4)ramfuncs: LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)/* Allocate uninitalized data sections: */.stack: > RAMM1PAGE = 1.ebss: > RAMGS11PAGE = 1.esysmem: > RAMM1PAGE = 1/* Initalized sections go in Flash */.econst: > FLASHBPAGE = 0, ALIGN(4).switch: > FLASHBPAGE = 0, ALIGN(4).reset: > RESET,PAGE = 0, TYPE = DSECT /* not used, */twiddleFactors: > RAMGS12,PAGE = 1buffer1: > RAMGS12, ALIGN = 256, PAGE = 1buffer2: > RAMGS13, ALIGN = 256, PAGE = 1SHARERAMGS0: > RAMGS0,PAGE = 1SHARERAMGS1: > RAMGS1,PAGE = 1Cla1Prog: LOAD = FLASHD,RUN = RAMLS4_5,LOAD_START(_Cla1funcsLoadStart),LOAD_END(_Cla1funcsLoadEnd),RUN_START(_Cla1funcsRunStart),LOAD_SIZE(_Cla1funcsLoadSize),PAGE = 0, ALIGN(8)CLADataLS0: > RAMLS0, PAGE=0CLADataLS1: > RAMLS1, PAGE=0Cla1ToCpuMsgRAM: > CLA1_MSGRAMLOW,PAGE = 1CpuToCla1MsgRAM: > CLA1_MSGRAMHIGH,PAGE = 1#ifdef __TI_COMPILER_VERSION#if __TI_COMPILER_VERSION >= 15009000.TI.ramfunc : {} LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)#elseramfuncs: LOAD = FLASHD,RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,LOAD_START(_RamfuncsLoadStart),LOAD_SIZE(_RamfuncsLoadSize),LOAD_END(_RamfuncsLoadEnd),RUN_START(_RamfuncsRunStart),RUN_SIZE(_RamfuncsRunSize),RUN_END(_RamfuncsRunEnd),PAGE = 0, ALIGN(4)#endif
#endif/* The following section definitions are required when using the IPC API Drivers */GROUP : > CPU2TOCPU1RAM, PAGE = 1{PUTBUFFERPUTWRITEIDXGETREADIDX}GROUP : > CPU1TOCPU2RAM, PAGE = 1{GETBUFFER :TYPE = DSECTGETWRITEIDX :TYPE = DSECTPUTREADIDX :TYPE = DSECT}#ifdef CLA_C/* CLA C compiler sections *///// Must be allocated to memory the CLA has write access to//CLAscratch:{ *.obj(CLAscratch). += CLA_SCRATCHPAD_SIZE;*.obj(CLAscratch_end) } >RAMLS1,PAGE = 0.scratchpad: > RAMLS1,PAGE = 0.bss_cla: > RAMLS1,PAGE = 0.const_cla:LOAD = FLASHB,RUN = RAMLS1,RUN_START(_Cla1ConstRunStart),LOAD_START(_Cla1ConstLoadStart),LOAD_SIZE(_Cla1ConstLoadSize),PAGE = 0
#endif //CLA_C
}/*
//===========================================================================
// End of file.
//===========================================================================
*/

不好意思，之前附件选错了。重发了，在仿真环境下是正常运行的

2837xD_RAM_lnk_cpu2.txt

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_CMEMORY
{
PAGE 0 :/* BEGIN is used for the "boot to SARAM" bootloader mode*/BEGIN: origin = 0x000000, length = 0x000002RAMM0: origin = 0x000122, length = 0x0002DERAMD0: origin = 0x00B000, length = 0x000800RAMLS0: origin = 0x008000, length = 0x000800RAMLS1: origin = 0x008800, length = 0x000800RAMLS2: origin = 0x009000, length = 0x000800RAMLS3: origin = 0x009800, length = 0x000800/*RAMLS4: origin = 0x00A000, length = 0x000800*/RAMLS4_5: origin = 0x00A000,length = 0x001000RESET: origin = 0x3FFFC0, length = 0x000002PAGE 1 :BOOT_RSVD: origin = 0x000002, length = 0x000120/* Part of M0, BOOT rom will use this for stack */RAMM1: origin = 0x000400, length = 0x000400/* on-chip RAM block M1 */RAMD1: origin = 0x00B800, length = 0x000800/*RAMLS5: origin = 0x00A800, length = 0x000800*/RAMGS0: origin = 0x00C000, length = 0x001000RAMGS1: origin = 0x00D000, length = 0x001000RAMGS2: origin = 0x00E000, length = 0x001000RAMGS3: origin = 0x00F000, length = 0x001000RAMGS4: origin = 0x010000, length = 0x001000RAMGS5: origin = 0x011000, length = 0x001000RAMGS6: origin = 0x012000, length = 0x001000RAMGS7: origin = 0x013000, length = 0x001000RAMGS8: origin = 0x014000, length = 0x001000RAMGS9: origin = 0x015000, length = 0x001000RAMGS10: origin = 0x016000, length = 0x001000RAMGS11: origin = 0x017000, length = 0x001000//RAMGS12: origin = 0x018000, length = 0x001000//RAMGS13: origin = 0x019000, length = 0x001000//RAMGS14: origin = 0x01A000, length = 0x001000//RAMGS15: origin = 0x01B000, length = 0x001000RAMGS12to15: origin = 0x018000, length = 0x004000CPU2TOCPU1RAM: origin = 0x03F800, length = 0x000400CPU1TOCPU2RAM: origin = 0x03FC00, length = 0x000400CANA_MSG_RAM: origin = 0x049000, length = 0x000800CANB_MSG_RAM: origin = 0x04B000, length = 0x000800CLA1_MSGRAMLOW: origin = 0x001480,length = 0x000080CLA1_MSGRAMHIGH: origin = 0x001500,length = 0x000080
}SECTIONS
{codestart: > BEGIN,PAGE = 0ramfuncs: > RAMM0PAGE = 0.text: >>RAMM0 | RAMD0 |RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4,PAGE = 0.cinit: > RAMM0,PAGE = 0.pinit: > RAMM0,PAGE = 0.switch: > RAMM0,PAGE = 0.reset: > RESET,PAGE = 0, TYPE = DSECT /* not used, */.stack: > RAMM1,PAGE = 1.ebss: > RAMGS11,PAGE = 1.econst: > RAMLS5,PAGE = 1.esysmem: > RAMLS5,PAGE = 1Filter_RegsFile: > RAMGS0,PAGE = 1ramgs0: > RAMGS0,PAGE = 1ramgs1: > RAMGS1,PAGE = 1/* CLA specific sections */#if defined(__TI_EABI__)Cla1Prog: LOAD = FLASHD,RUN = RAMLS4_5,LOAD_START(Cla1funcsLoadStart),LOAD_END(Cla1funcsLoadEnd),RUN_START(Cla1funcsRunStart),LOAD_SIZE(Cla1funcsLoadSize),PAGE = 0, ALIGN(8)#elseCla1Prog: LOAD = FLASHD,RUN = RAMLS4_5,LOAD_START(_Cla1funcsLoadStart),LOAD_END(_Cla1funcsLoadEnd),RUN_START(_Cla1funcsRunStart),LOAD_SIZE(_Cla1funcsLoadSize),PAGE = 0, ALIGN(8)#endifCLADataLS0: > RAMLS0, PAGE=0CLADataLS1: > RAMLS1, PAGE=0Cla1ToCpuMsgRAM: > CLA1_MSGRAMLOW,PAGE = 1CpuToCla1MsgRAM: > CLA1_MSGRAMHIGH,PAGE = 1#ifdef __TI_COMPILER_VERSION#if __TI_COMPILER_VERSION >= 15009000.TI.ramfunc : {} > RAMM0,PAGE = 0#endif
#endif/* The following section definitions are required when using the IPC API Drivers */GROUP : > CPU1TOCPU2RAM, PAGE = 1{PUTBUFFERPUTWRITEIDXGETREADIDX}GROUP : > CPU2TOCPU1RAM, PAGE = 1{GETBUFFER :TYPE = DSECTGETWRITEIDX :TYPE = DSECTPUTREADIDX :TYPE = DSECT}/* The following section definition are for SDFM examples */Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444Difference_RegsFile : >RAMGS5,PAGE = 1, fill=0x3333#ifdef CLA_C/* CLA C compiler sections *///// Must be allocated to memory the CLA has write access to//CLAscratch:{ *.obj(CLAscratch). += CLA_SCRATCHPAD_SIZE;*.obj(CLAscratch_end) } >RAMLS1,PAGE = 0.scratchpad: > RAMLS1,PAGE = 0.bss_cla: > RAMLS1,PAGE = 0.const_cla:LOAD = FLASHB,RUN = RAMLS1,RUN_START(_Cla1ConstRunStart),LOAD_START(_Cla1ConstLoadStart),LOAD_SIZE(_Cla1ConstLoadSize),PAGE = 0
#endif //CLA_C
}/*
//===========================================================================
// End of file.
//===========================================================================
*/

,

Green Deng：

你好，我在E2E论坛上找到这个帖子，你可以参考一下：
e2e.ti.com/…/819771

,

user4522357：

他提到的问题我是知道的，我遇见的问题不是CLA里的程序没有运行，感觉是没有烧到FLASH里或是其它原因

,

Green Deng：

抱歉漏贴了。看到你的问题已经解决https://e2echina.ti.com/question_answer/microcontrollers/c2000/f/56/t/198704

方便的话可以分享一下解决经验，以供其他工程师参考。

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