TI中文支持网各位老师，我现在的应用是有好几个外部中断，这些中断可能同时发生，或者时间很近先后发生，然后MCU的IO口不够，查了资料想用PCA9534，但是问题是不清楚在IO口电平变化导致INT中断但是单片机还没有去处理中断时，要是又有其他端口也发生了电平变化引起中断，这个时候新的中断事件会不会被INT捕获，还是说就PASS掉了。
Kailyn Chen：
您好，您是使用TCA9534还是PCA9534？ TCA9534 是PCA9534的升级版本，PCA9534 的中断有些问题，所以主页上有PCA9534的勘误表。 您参考下这个帖子，客户在使用PCA9534的时候收到多个中断：e2e.ti.com/…/658242
user5978059：
回复 Kailyn Chen:
我要用的是TCA9534，但是看了数据手册，对于多个中断同时发生或者相隔很近发生芯片会怎么处理没说清楚，然后PCA的勘误表在他的主页上没找到，关于这个多个中断发生的处理方式，有没有特别的文件说明呢，谢谢了
Kailyn Chen：
回复 user5978059:
您好， 很抱歉没有特别的文档对中断做说明。
关于多个中断的问题，我再和美国工程师确认下。给您带来不便非常抱歉。
user5978059：
回复 Kailyn Chen:
好的，非常感谢
Kailyn Chen：
回复 user5978059:
您好,我这边已经收到美国工程师的答复, 关于中断解释的非常详细, 我把他的回复粘贴到这里, 就不做翻译了, 如果您哪里还有问题,我们可随时讨论:
The INT pin is pulled low whenever any input pin changes state, including when multiple pins change state. The INT signal is cleared/released upon a read from the Input Port register.*Relating to your question, this means that, if the customer's application sees multiple inputs change at once, the INT pin will be pulled low, just like it would for any single input changing by itself. Once the byte is read from the Input Port register, the MCU will have received the data for all of the input ports on the TCA9534 P7-P0, and then the INT flag will clear.
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Let me try to make an example to see if this fits the application in question:
Let's say all pins P7-P0 are currently configured as inputs, and all of them are logic high. The INT pin will remain logic high while this remains true. Any read of register 0 will show the current states of these pins (ex. 0xFF).
If P0 falls low, the INT pin will also pull low. When the MCU reads register 0, it will receive 0xFE, since P0 is now low. After reading, INT is high again until the next change.
After this, let's say P3, P2, and P1 also all fall low at the same exact time. Here, INT will pull low until register 0 is read by the MCU. When the MCU reads register 0, it will receive 0xF0, and then INT will be high again.
*The INT pin also clears if the input pins change back to their original state before being read. In other words, if the MCU does not read register 0 before the input pin changes back, the INT pin will still be cleared. For in-depth timing considerations for interrupts, look at section 8.3.2 of the datasheet.
