F28335 SCI接收中断会不定时进不去

您好，在使用两片F28335 SCI通信时，配置为普通的SCI模式，运行一段时间后会出现接收中断超过3S接收不到数据。发送采用定时30MS发送1次，波特率设为125k,1次34个数据，接收到34个数据时接收计时清零，否则计时增加，3S后判定为SCI断开。

影响接收错误可能原因是什么，我要怎么查找问题？
如果使用FIFO模式要怎么设置寄存器，因为一次发送34个数据，接收FIFO有16个，我怎么设置接收中断何时进入？

void scia_init()
{
    // Note: Clocks were turned on to the SCIA peripheral
    // in the InitSysCtrl() function

    // Reset FIFO's
    SciaRegs.SCIFFTX.all=0x8000;

    SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
                                   // No parity,8 char bits,
                                   // async mode, idle-line protocol
    SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
                                   // Disable RX ERR, SLEEP, TXWAKE
    SciaRegs.SCICTL2.all =0x0002;  //enable receiver-buffer/break interrupt, disable tx int
    SciaRegs.SCICTL2.bit.RXBKINTENA =1;
    //SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
 
    SciaRegs.SCIHBAUD = 0x0000;
    SciaRegs.SCILBAUD = SCI_PRD;  //设置波特率为250kpbs
    //SciaRegs.SCICCR.bit.LOOPBKENA =0; // disable loop back
    //SciaRegs.SCIFFTX.all=0xC028;
    //SciaRegs.SCIFFRX.all=0x0028;
    //SciaRegs.SCIFFCT.all=0x00;
       SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
    //SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
    //SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
 
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
   EALLOW; // This is needed to write to EALLOW protected registers
   PieVectTable.SCIRXINTA = &sciaRx_Isr;
   //PieVectTable.SCITXINTA = &txaint_isr;
   //PieVectTable.SCIRXINTB = &scibRxFifoIsr;
   //PieVectTable.SCITXINTB = &scibTxFifoIsr;
   EDIS;   // This is needed to disable write to EALLOW protected registers
  // enable interrupts:
   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, intx1,enable sci_rx_a
   //PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INTx2
   //PieCtrlRegs.PIEIER9.bit.INTx3=1;     // PIE Group 9, INTx3
   //PieCtrlRegs.PIEIER9.bit.INTx4=1;     // PIE Group 9, INTx4
   IER |= 0x0100; // Enable CPU INT9
   //EINT;
}

  delay_time(10);
        SciaRegs.SCITXBUF=0xFB;//发送缓冲寄存器
        while(SciaRegs.SCICTL2.bit.TXEMPTY ==0)
           { } // 等待发送缓冲器及移位寄存器都为空

     for(i = 0; i < UART_LEN-2; i++)//send data
     {
      if((SendChar[i]==0xFB)||(SendChar[i]==0xFC)||(SendChar[i]==0xF0))
            {
       SciaRegs.SCITXBUF=0xF0;//发送缓冲寄存器
       while(SciaRegs.SCICTL2.bit.TXEMPTY ==0)
          { } // 等待发送缓冲器及移位寄存器都为空
       delay_time(10);
       SciaRegs.SCITXBUF=(SendChar[i]&0x0F);//发送缓冲寄存器
       while(SciaRegs.SCICTL2.bit.TXEMPTY ==0)
          { } // 等待发送缓冲器及移位寄存器都为空
       delay_time(10);
            }
      else
      {
       SciaRegs.SCITXBUF=SendChar[i];//发送缓冲寄存器
       while(SciaRegs.SCICTL2.bit.TXEMPTY ==0)
             { } // 等待发送缓冲器及移位寄存器都为空
       delay_time(10);
      }
        }

        delay_time(10);
        SciaRegs.SCITXBUF=0xFC;//发送缓冲寄存器
        while(SciaRegs.SCICTL2.bit.TXEMPTY ==0)
           { } // 等待发送缓冲器及移位寄存器都为空

interrupt void sciaRx_Isr(void)
{
    Uint16 i;
 unsigned char data;
 
 if(SciaRegs.SCIRXST.bit.RXRDY == 1)// SCI Receiver Status Register
 {
    //ready to be read from rx buffer
       data = SciaRegs.SCIRXBUF.all;  // Read data
       sci_receive[j] = data;
       PieCtrlRegs.PIEACK.all|=0x0100;       // Issue PIE ack
    }
}