TI中文支持网当运行PWMclose时，会出现引脚置高的情况，代码如下：
bool PWMInit(PIN_Id pinId, uint32_t uiFrequency, uint8_t ucDutyCycle)
{
PWMpin=pinId;
Freq=uiFrequency;
duration=ucDutyCycle;
PIN_remove(BeepPinHdl, PWMpin);
PIN_Config BeepPinCfg[] = {PWMpin| PIN_GPIO_OUTPUT_EN | PIN_PULLUP | PIN_GPIO_LOW | PIN_DRVSTR_MAX};
BeepPinHdl = PIN_open(&BeepPinState, BeepPinCfg);
PINCC26XX_setMux(BeepPinHdl, PWMpin, IOC_PORT_MCU_PORT_EVENT0);
//RTOS: Enable peripheral domain and clocks for timer
Power_setDependency(PERIPH_GPT0);
//RTOS: Disallow standby while timer is running
Power_setConstraint(Power_SB_DISALLOW);
TimerConfigure(GPT0_BASE, TIMER_CFG_A_PWM | TIMER_CFG_SPLIT_PAIR); if(pinId==NULL){
return false;}
else{if(uiFrequency==NULL){
return false;}
else{if(ucDutyCycle==NULL){
return false;}
else{
return true;}
} }
}
void PWMOpen(void)
{ unsigned long PWM_DIV_FACTOR = 0;
unsigned long TIMER_LOADSET = 0;
unsigned long TIMER_MATCH;
if(duration > 100)
duration = 100;
if (Freq < 732) Freq = 800;
PWM_DIV_FACTOR = 48000000/Freq; TIMER_MATCH = (PWM_DIV_FACTOR*(100-duration)/100-1); TIMER_LOADSET = (PWM_DIV_FACTOR-1);
TimerLoadSet(GPT0_BASE,TIMER_A,TIMER_LOADSET);
TimerMatchSet(GPT0_BASE,TIMER_A,TIMER_MATCH);
TimerEventControl(GPT0_BASE, TIMER_A, TIMER_EVENT_NEG_EDGE);
TimerEnable(GPT0_BASE,TIMER_A);
}
void PWMClose(void)
{
TimerDisable(GPT0_BASE, TIMER_A);
// PIN_setOutputValue(BeepPinHdl,PWMpin,0);
}
经常在执行过PWMClose之后，发现配置的引脚输出为高
harry lee：
GPIO设置此引脚，不起作用
用以下语句设置PWM输出level
TimerLevelControl(uint32_t ui32Base, uint32_t ui32Timer, bool bInvert);
此语句设置了 CTL寄存器中的 PnPWML
close后，可以使引脚变为低
long chan：
回复 harry lee:
我也有用过这个函数，但是并不起作用，引脚电平还是不确定，为什么呢
harry lee：
回复 long chan:
TimerLevelControl(GPT0_BASE, TIMER_A,1);
刚刚又测过一遍，是有效的。
如最后一个参数写1 ，PWM停止后是低电平，占空比也相反了
如最后一个参数写0，PWM停止后是高电平
如果屏蔽这句，PWM停止后是高电平
