am335x的clkou2如何使能输出？并且cdce913的Y2如何能配置为50MHz输出？

1、我们自己的板子，AM3359处理器，在设计的时候双网口分别使用rgmii和rmii接口，因为rmii接口为50MHz时钟，而我使用cdce913的设备树，配置不出50MHz时钟，输入时钟为25MHz，80MHz以上没有问题，虽然cdce913的fvco最小是80MHz，但是不是还有分频呢吗！这个应该怎么配置？

2、关于clkout2的配置，我现在将rmii的时钟接到了clkout2上，clkout2时钟源设置为l3_gclk，然后4分频，这个都没有问题，可以在系统下查看，clkout确实是50MHz，但是如何在clkout2的管脚上使能输出呢？

我使用的sdk是06.03，最新的。

&clkout2_div_ck {
    clocks = <&l3_gclk>;
    ti,dividers = <4>;
};

上面是我在设备树里面加的。

&am33xx_pinmux {
pinctrl-names = "default"; /* 管脚默认状态配置 */
pinctrl-0 = <&clkout2_pin>; /* eth1时钟 */

clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};

管脚复用里面也设置了，但是不知道怎么使能clkout2输出。

user5850447：

后来，我是在uboot里面直接写寄存器，才使能clkout2输出的，可是设备树里面应该怎么写呢？

Shine：

是否有参考过下面帖子的dts配置？
e2e.ti.com/…/834551

user5850447：

回复 Shine:

恩，我参考过，但是还是一样的，就是配置完成后，clkou2并没有时钟输出，查看/sys/kernel/debug/clk/clkout2_ck里面的clk_rate分频出来的频率是对的，但是clkout2就是没有输出！

Shine：

回复 user5850447:

能否把完整的dts文件发一下？

user5850447：

回复 Shine:

/** Copyright (C) 2012 Texas Instruments Incorporated – http://www.ti.com/** This program is free software; you can redistribute it and/or modify* it under the terms of the GNU General Public License version 2 as* published by the Free Software Foundation.*/
/dts-v1/;

#include "am33xx.dtsi"
#include <dt-bindings/display/tda998x.h>

/ {model = "AM335x HDMI";compatible = "ti,am335x-hdmi", "ti,am33xx";chosen {stdout-path = &uart0;tick-timer = &timer2;};
cpus {cpu@0 {cpu0-supply = <&vdd1_reg>;};};
memory {device_type = "memory";reg = <0x80000000 0x20000000>;/* 512 MB */ };
vbat: fixedregulator@0 {compatible = "regulator-fixed";regulator-name = "vbat";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;regulator-boot-on;};
leds {pinctrl-names = "default";pinctrl-0 = <&user_leds_s0>;
compatible = "gpio-leds";
led@2 {label = "beaglebone:green:heartbeat";/* hartbeat 心跳指示灯 */gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;linux,default-trigger = "heartbeat";default-state = "off";};
led@3 {/* mmc0 指示灯 */label = "beaglebone:green:mmc0";gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;linux,default-trigger = "mmc0";default-state = "off";};};

};

&am33xx_pinmux {pinctrl-names = "default";/* 管脚默认状态配置 */pinctrl-0 = <&clkout2_pin>;/* eth1时钟 */
clkout2_pin: pinmux_clkout2_pin {pinctrl-single,pins = <0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */>;};
user_leds_s0: user_leds_s0 {pinctrl-single,pins = <0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.gpio1_12 */0x34 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ad13.gpio1_13 */>;};
i2c0_pins: pinmux_i2c0_pins {pinctrl-single,pins = <0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */>;};
i2c2_pins: pinmux_i2c2_pins {pinctrl-single,pins = <0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */>;};
uart0_pins: pinmux_uart0_pins {pinctrl-single,pins = <0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */>;};
uart1_pins: pinmux_uart1_pins {pinctrl-single,pins = <0x1a4 (PIN_OUTPUT | MUX_MODE7)/* conf_mcasp0_fsr .gpio3[19] */0x180 (PIN_INPUT_PULLUP | MUX_MODE0)/* uart1_rxd.uart1_rxd */0x184 (PIN_OUTPUT | MUX_MODE0)/* uart1_txd.uart1_txd */>;};
dcan1_pins_default: dcan1_pins_default {pinctrl-single,pins = <0x168 (PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */0x16c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */>;};
spi0_pins_default: spi0_pins_default {pinctrl-single,pins = <0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */>;};

cpsw_default: cpsw_default {pinctrl-single,pins = </* Slave 1 千兆以太网，*/0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */0x118 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_txd3 */0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_txd2 */0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */ 0x12c (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_txclk.rgmii1_txclk */0x130 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxclk.rgmii1_rxclk */0x134 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd3.rgmii1_rxd3 */0x138 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd2.rgmii1_rxd2 */0x13c (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */0x140 (PIN_INPUT_PULLUP | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 *//* Slave 2 rmii百兆网*/0x078 (PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_col.rmii2_refclk */0x070 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wait0.rmii2_crs */0x074 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wpn.rmii2_rxerr */0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a0.rmii2_txen */0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a4.rmii2_txd1 */0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a5.rmii2_txd0 */0x068 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a10.rmii2_rxd1 */0x06c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a11.rmii2_rxd0 */>;};
cpsw_sleep: cpsw_sleep {pinctrl-single,pins = </* Slave 1 千兆以太网，复位值 */0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txen.rgmii1_tctl */0x118 (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_rxdv.rgmii1_rctl */0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd3.rgmii1_txd3 */0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd2.rgmii1_txd2 */0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd1.rgmii1_txd1 */0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mii1_txd0.rgmii1_txd0 */ 0x12c (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_txclk.rgmii1_txclk */0x130 (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_rxclk.rgmii1_rxclk */0x134 (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_rxd3.rgmii1_rxd3 */0x138 (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_rxd2.rgmii1_rxd2 */0x13c (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_rxd1.rgmii1_rxd1 */0x140 (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_rxd0.rgmii1_rxd0 *//* Slave 2 rmii百兆网*/0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* mii1_col.rmii2_refclk */0x070 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wait0.rmii2_crs */0x074 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.rmii2_rxerr */0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.rmii2_txen */0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.rmii2_txd1 */0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.rmii2_txd0 */0x068 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a10.rmii2_rxd1 */0x06c (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a11.rmii2_rxd0 */>;};
davinci_mdio_default: davinci_mdio_default {pinctrl-single,pins = </* MDIO */0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)/* mdio_clk.mdio_clk */>;};
davinci_mdio_sleep: davinci_mdio_sleep {pinctrl-single,pins = </* MDIO reset value */0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)>;};
mmc1_pins: pinmux_mmc1_pins {pinctrl-single,pins = <0x07c (PIN_INPUT | MUX_MODE7) /* gpmc_csn0,GPIO1_29.mmc_cd */>;};
emmc_pins: pinmux_emmc_pins {pinctrl-single,pins = <0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */>;};
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {pinctrl-single,pins = <AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)/* lcd_data0.lcd_data0 */AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)/* lcd_data1.lcd_data1 */AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)/* lcd_data2.lcd_data2 */AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)/* lcd_data3.lcd_data3 */AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)/* lcd_data4.lcd_data4 */AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)/* lcd_data5.lcd_data5 */AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)/* lcd_data6.lcd_data6 */AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)/* lcd_data7.lcd_data7 */AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)/* lcd_data8.lcd_data8 */AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)/* lcd_data9.lcd_data9 */AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)/* lcd_data10.lcd_data10 */AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)/* lcd_data11.lcd_data11 */AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)/* lcd_data12.lcd_data12 */AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)/* lcd_data13.lcd_data13 */AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)/* lcd_data14.lcd_data14 */AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)/* lcd_data15.lcd_data15 */AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */>;};
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {pinctrl-single,pins = <AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */>;};
mcasp0_pins: mcasp0_pins {pinctrl-single,pins = <AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLUP | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/AM33XX_IOPAD(0x994, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */AM33XX_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.GPIO2_2*/>;};
};

&uart0 {pinctrl-names = "default";pinctrl-0 = <&uart0_pins>;
status = "okay";
};

&uart1 {pinctrl-names = "default";pinctrl-0 = <&uart1_pins>;status = "okay";rts-gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;rs485-rts-active-high;rs485-rx-during-tx;rs485-rts-delay = <1 1>;linux,rs485-enabled-at-boot-time;
};

/*********测试clkout2的输出****************/
&clkout2_div_ck {clocks = <&l3_gclk>;ti,dividers = <4>;
};

&clkout2_ck {status = "okay";
};
/***************************************/

&i2c0 {pinctrl-names = "default";pinctrl-0 = <&i2c0_pins>;
status = "okay";clock-frequency = <400000>;
/* tps65910 PMIC */tps: tps@2d {reg = <0x2d>;};
/* eeprom 配置 */baseboard_eeprom: baseboard_eeprom@50 {compatible = "at,24c256";reg = <0x50>;
#address-cells = <1>;#size-cells = <1>;baseboard_data: baseboard_data@0 {reg = <0 0x100>;};};
/* 以太网时钟芯片 */cdce913: cdce913@65 {compatible = "ti,cdce913";reg = <0x65>;clocks = <&xtal25mhz>; #clock-cells = <1>;/* xtal-load-pf = <18>;*//* PLL options to get SSC 1% centered */PLL1 {spread-spectrum = <4>;spread-spectrum-center;clock-frequency = <50000000>;};
xtal25mhz: xtal25mhz {compatible = "fixed-clock";#clock-cells = <0>;/* 提供一个输出 */clock-frequency = <25000000>;};};
pcf8563: rtc@51 {compatible = "nxp,pcf8563";reg = <0x51>; };
tda19988: tda19988@70 {compatible = "nxp,tda998x";reg = <0x70>;
pinctrl-names = "default", "off";pinctrl-0 = <&nxp_hdmi_bonelt_pins>;pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */video-ports = <0x234501>;
#sound-dai-cells = <0>;audio-ports = < TDA998x_I2S 0x03>;
ports {port@0 {hdmi_0: endpoint@0 {remote-endpoint = <&lcdc_0>;};};};};

&i2c2 {pinctrl-names = "default";pinctrl-0 = <&i2c2_pins>;
status = "okay";clock-frequency = <400000>;
};

&usb {status = "okay";
};

&usb_ctrl_mod {status = "okay";
};

&usb0_phy {status = "okay";
};

&usb1_phy {status = "okay";
};

&usb0 {status = "okay";dr_mode = "host";
};

&usb1 {status = "okay";dr_mode = "host";
};

&cppi41dma{status = "okay";
};

&dcan1 {status = "okay";pinctrl-names = "default";pinctrl-0 = <&dcan1_pins_default>;
};

&spi0 {status = "okay";pinctrl-names = "default";pinctrl-0 = <&spi0_pins_default>;ti,pindir-d0-out-d1-in;spi-flash@0 {reg = <0>;compatible = "winbond,w25q64jv", "spi-flash";};
};

#include "tps65910.dtsi"

&tps {vcc1-supply = <&vbat>;vcc2-supply = <&vbat>;vcc3-supply = <&vbat>;vcc4-supply = <&vbat>;vcc5-supply = <&vbat>;vcc6-supply = <&vbat>;vcc7-supply = <&vbat>;vccio-supply = <&vbat>;
regulators {vrtc_reg: regulator@0 {regulator-always-on;};
vio_reg: regulator@1 {regulator-always-on;};
vdd1_reg: regulator@2 {/* VDD_MPU voltage limits 0.95V – 1.26V with +/-4% tolerance */regulator-name = "vdd_mpu";regulator-min-microvolt = <912500>;regulator-max-microvolt = <1312500>;regulator-boot-on;regulator-always-on;};
vdd2_reg: regulator@3 {/* VDD_CORE voltage limits 0.95V – 1.1V with +/-4% tolerance */regulator-name = "vdd_core";regulator-min-microvolt = <912500>;regulator-max-microvolt = <1150000>;regulator-boot-on;regulator-always-on;};
vdd3_reg: regulator@4 {regulator-always-on;};
vdig1_reg: regulator@5 {regulator-always-on;};
vdig2_reg: regulator@6 {regulator-always-on;};
vpll_reg: regulator@7 {regulator-always-on;};
vdac_reg: regulator@8 {regulator-always-on;};
vaux1_reg: regulator@9 {regulator-always-on;};
vaux2_reg: regulator@10 {regulator-always-on;};
vaux33_reg: regulator@11 {regulator-always-on;};
vmmc_reg: regulator@12 {regulator-min-microvolt = <1800000>;regulator-max-microvolt = <3300000>;regulator-always-on;};};
};

&cpsw_emac0 {phy_id = <&davinci_mdio>, <0>;
// phy-handle = <&ethphy0>;phy-mode = "rgmii-txid";dual_emac_res_vlan = <1>;//新添加
};

&cpsw_emac1 {phy_id = <&davinci_mdio>, <3>;
// phy-handle = <&ethphy1>;phy-mode = "rmii";dual_emac_res_vlan = <2>;//新添加
};

&mac {
// slaves = <2>;pinctrl-names = "default", "sleep";pinctrl-0 = <&cpsw_default>;pinctrl-1 = <&cpsw_sleep>;dual_emac;//新添加status = "okay";
};

&davinci_mdio {pinctrl-names = "default", "sleep";pinctrl-0 = <&davinci_mdio_default>;pinctrl-1 = <&davinci_mdio_sleep>;status = "okay";
reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;//以太网复位控制reset-delay-us = <120>;/* PHY datasheet states 100uS min *///延时,KSZ9031RNX
//ethphy0: ethernet-phy@0 {//// rxc-skew-ps = <3000>;//// rxdv-skew-ps = <0>;//// txc-skew-ps = <3000>;//// txen-skew-ps = <0>;//reg = <0>;// };
//ethphy1: ethernet-phy@3 {//reg = <3>;// };
};

&mmc1 {status = "okay";vmmc-supply = <&vmmc_reg>;bus-width = <0x4>;pinctrl-names = "default";pinctrl-0 = <&mmc1_pins>;cd-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;/* tf卡的cd检测管脚 */
};

&mmc2 {vmmc-supply = <&vmmc_reg>;pinctrl-names = "default";pinctrl-0 = <&emmc_pins>;bus-width = <8>;status = "okay";
};

&lcdc {status = "okay";
/* If you want to get 24 bit RGB and 16 BGR mode instead of* current 16 bit RGB and 24 BGR modes, set the propety* below to "crossed" and uncomment the video-ports -property* in tda19988 node.*//*blue-and-red-wiring = "straight";*/blue-and-red-wiring = "crossed";//crossedstraight
port {lcdc_0: endpoint@0 {remote-endpoint = <&hdmi_0>;};};
};

/ {hdmi {compatible = "ti,tilcdc,slave";i2c = <&i2c0>;pinctrl-names = "default", "off";pinctrl-0 = <&nxp_hdmi_bonelt_pins>;pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;status = "okay";};
};

&mcasp0 {#sound-dai-cells = <0>;pinctrl-names = "default";pinctrl-0 = <&mcasp0_pins>;status = "okay";op-mode = <0>; /* MCASP_IIS_MODE */tdm-slots = <2>;serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */0 0 1 0>;tx-num-evt = <32>;rx-num-evt = <32>;
};

/ {clk_mcasp0_fixed: clk_mcasp0_fixed {#clock-cells = <0>;compatible = "fixed-clock";clock-frequency = <24576000>;};
clk_mcasp0: clk_mcasp0 {#clock-cells = <0>;compatible = "gpio-gate-clock";clocks = <&clk_mcasp0_fixed>;enable-gpios = <&gpio2 2 0>; /* BeagleBone Black Clk enable on GPIO1_27 */};
sound {compatible = "simple-audio-card";simple-audio-card,name = "KZTOP AM335x hdmi";simple-audio-card,format = "i2s";simple-audio-card,bitclock-master = <&dailink0_master>;simple-audio-card,frame-master = <&dailink0_master>;
dailink0_master: simple-audio-card,cpu {sound-dai = <&mcasp0>;clocks = <&clk_mcasp0>;};
simple-audio-card,codec {sound-dai = <&tda19988>;};};
};

&sgx {status = "okay";
};

&cpu0_opp_table {/** All PG 2.0 silicon may not support 1GHz but some of the early* BeagleBone Blacks have PG 2.0 silicon which is guaranteed* to support 1GHz OPP so enable it for PG 2.0 on this board.*/oppnitro-800000000 {opp-supported-hw = <0x06 0x0100>;};
};

&rtc {system-power-controller;
};

&aes {status = "okay";
};

&sham {status = "okay";
};

Shine：

回复 user5850447:

请参考下面e2e工程师的回复，CLKOUT2管脚因为jitter的问题，是不建议作为时钟源的，一般做debug用。
e2e.ti.com/…/912565

user5850447：

回复 Shine:

非常感谢，那CLKOUT2我就不纠结了，主要还是CDCE913的50MHZ输出了，在设备树中的配置问题！

Shine：

回复 user5850447:

不客气，在另外一个帖子回复如何在设备树中配置CDCE913。