TI中文支持网#define period 300 //300 cycles -> 200KHz @60MHz CPU
#define period_instr_pwm 120 //512 cycles -> 117k @60MHz CPU
// Configure PWM1 for 200Khz switching Frequency PWM_1ch_UpDwnCnt_CNF(1, period, 1, 0); // Configure PWM2 for 200Khz switching Frequency PWM_1ch_UpDwnCnt_CNF(2, period, 0, 0);
// Configure PWM4 for Instrumentation; 1Mhz switching Frequency PWM_1ch_UpDwnCnt_CNF(4, period_instr_pwm, 0, 0);
EALLOW;
SysCtrlRegs.PCLKCR1.bit.EPWM7ENCLK = 1; // ePWM7
// Setup TBCLK
EPwm7Regs.TBPRD = 3000; // Set timer period 3000 TBCLKs
EPwm7Regs.TBPHS.half.TBPHS = 0x0000; // Phase is 0
EPwm7Regs.TBCTR = 0x0000; // Clear counter
// Setup counter mode
EPwm7Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
EPwm7Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Disable phase loading
EPwm7Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
EPwm7Regs.TBCTL.bit.CLKDIV = TB_DIV1;
EPwm7Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO;
// Configure the Start of Conversion for the ADC.
EPwm7Regs.ETSEL.bit.INTEN = 1; // EPwm7Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // Select Int from counter = PRD
EPwm7Regs.ETPS.bit.INTPRD = ET_1ST; // Generate pulse on 1st event
PieVectTable.EPWM7_INT = &SECONDARY_ISR; IER |= M_INT3; // Enable CPU INT3 for capture interrupt PieCtrlRegs.PIEIER3.bit.INTx7 = 1; // Enable EPWM7 int in PIE group 3
EDIS;
Susan Yang：请问您现在使用的硬件是什么？
若是TMDSHVBLPFCKIT的话，则无法改变PWM的频率，因为该BLPFC套件专为200kHz PWM而设计的
