为何我的28027中EPWM4B引脚不能正常的强制输出低电平呢

 EPwm4Regs.TBPRD =14999; // 2K for Beep 60M/2=30M
 EPwm4Regs.CMPA.half.CMPA = 7500; // Set duty as 50%
 //EPwm4Regs.TBCTR = 0; // 复位为0
 EPwm4Regs.TBCTL.bit.PRDLD = TB_SHADOW ;
 EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
 //EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE; // 默认禁止
 EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; //禁止同步输出
 //EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // 默认2分频
 //EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1; //默认不分频
 EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO ; // Load on CTR=PRD
 EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
 EPwm4Regs.AQCTLB.bit.ZRO = AQ_SET;
 EPwm4Regs.AQCTLB.bit.CAU = AQ_CLEAR;

 EPwm4Regs.AQSFRC.bit.RLDCSF = 3 ;//立即生效
 //关闭蜂鸣器输出和风扇输出
 BeepOff();//关闭蜂鸣器EPwm4Regs.AQCSFRC.bit.CSFB = 1

囧：

你有配置过DB死区模块吗？那里面有个反相功能，AQ模块的强制拉低在这个模块之前，所以会收DB模块影响，推荐用TZ模块强制拉低。

 EPwm4Regs.TBPRD =14999; // 2K for Beep 60M/2=30M
 EPwm4Regs.CMPA.half.CMPA = 7500; // Set duty as 50%
 //EPwm4Regs.TBCTR = 0; // 复位为0
 EPwm4Regs.TBCTL.bit.PRDLD = TB_SHADOW ;
 EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
 //EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE; // 默认禁止
 EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE; //禁止同步输出
 //EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // 默认2分频
 //EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1; //默认不分频
 EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO ; // Load on CTR=PRD
 EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
 EPwm4Regs.AQCTLB.bit.ZRO = AQ_SET;
 EPwm4Regs.AQCTLB.bit.CAU = AQ_CLEAR;

 EPwm4Regs.AQSFRC.bit.RLDCSF = 3 ;//立即生效
 //关闭蜂鸣器输出和风扇输出
 BeepOff();//关闭蜂鸣器EPwm4Regs.AQCSFRC.bit.CSFB = 1

感应：

回复 囧:

不好意思，浪费你你宝贵时间，后来找到是因为时钟没开引起的